PRELIMINARY DATA SHEET
3 V, SILICON MMIC 150 MHz
QUADRATURE MODULATOR
FEATURES
•
•
•
•
•
•
•
OPERATING FREQUENCY:
50 to 150 MHz
I/Q INPUT FREQUENCY RANGE:
DC to 500 kHz
DIGITAL 90
°
PHASE SHIFTER
ALLOWABLE BIAS VOLTAGE:
2.7 to 5.5 V
POWER SAVE: "SLEEP" MODE
SMALL SIZE SSOP20 SURFACE MOUNT PACKAGE
TAPE AND REEL PACKAGING OPTION AVAILABLE
UPC8101GR
INTERNAL BLOCK DIAGRAM
13
20
19
18
17
16
15
14
12
11
REG.
F/F
90˚
270˚
0˚
180˚
LPF
LPF
DESCRIPTION
The UPC8101GR is a Silicon Monolithic Integrated Circuit
(MMIC) which is manufactured using NEC's 20 GHz f
T
NESAT
III process. The Quadrature Modulator was designed for
digital mobile communications in general, and the CT2 band
requirements in particular. Operating on DC bias voltages as
low as 2.7 volts, this IC is ideal for handheld/portable designs.
The UPC8101GR takes an external LO signal, and digitally
divides its frequency by two to generate the quadrature LO
required for the dual internal mixer circuits. These mixers also
receive external in-phase (I) and quadrature (Q) signals. The
up-converted outputs of the mixers are combined in a differ-
ential output amplifier. The resultant output signal is at fre-
quency of f
LO
/2 + f
I/Q
. Buffers are provided at the LO, I and Q
inputs, and filtering is provided between the digital frequency
divider and the mixers. The device can be powered down by
grounding the Enable pin.
NEC's stringent quality assurance and test procedures en-
sure the highest reliability and performance.
1
2
3
4
5
6
7
8
9
10
1. LOCAL IN
2. LOCAL IN
3. GND
4. Q-BIAS
5. Q-BIAS
6. GND
7. Q-INPUT
8. Q-INPUT
9. GND
10. IF OUTPUT
11. V
CC
12. V
ENABLE
13. I-INPUT
14. I-INPUT
15. GND
16. I-BIAS
17. I-BIAS
18. GND
19. N.C.
20. GND
Note: N.C. = No Connection
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C, LO P
IN
= -10 dBm, V
ENABLE
⊕1.8
V, Z
L
= 50
Ω)
PART NUMBER
PACKAGE OUTLINE
V
CC
= 2.7 V
SYMBOLS
I
CC
P
SAT
LO
LEAK
IM
REJ
IM
3
Z
I/Q
RL
LO
RL
IF
PARAMETERS AND CONDITIONS
Circuit Current
V
ENABLE
≤
1.0 V
Saturated Output Power
LO Leakage at IF Port (f
LO
/2)
Image Rejection at IF Port (f
LO
/2 -
I/Q Port Input Impedance
LO Port Return Loss
IF Port Return Loss
Power Enable Response Time
Power Enable Control Voltage
Turn on
Turn off
On
Off
f
I/Q
)
1
Third Order Intermodulation Distortion
1
UNITS
mA
mA
dBm
dBm
dBc
dBc
KΩ
dB
dB
µsec
µsec
V
V
1.8
500
28.5
MIN
10
-16
TYP
15
0.33
-11
-49
37
37
1000
26
21
1
1
5
3
5.5
1.0
1.8
500
MAX
22
0.4
-8
-37
28.5
MIN
17
-13
UPC8101GR
S20 (SSOP 20)
V
CC
= 5.5 V
TYP
24.5
1.05
-8
-39
38
56
700
26
21
1
1
5
3
5.5
1.0
MAX
32
1.2
-5
-28
τ
V
ENABLE
Note:
1. f
LO
= 300.1 MHz, f
I/Q
= 36 kHz at V
CC
/2 + 1 V
p-p
.
California Eastern Laboratories
UPC8101GR
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C)
SYMBOLS
V
CC
P
D
T
OP
T
STG
PARAMETERS
Supply Voltage
Power Dissipation
2
Operating Temperature
Storage Temperature
UNITS
V
mW
°C
°C
RATINGS
6.0
530
-20 to +70
-65 to +150
RECOMMENDED
OPERATING CONDITIONS
SYMBOLS
V
CC
T
OP
f
I/Q
f
LO
f
IF
V
I/Q
PARAMETERS
Supply Voltage
Operating Temperature
I/Q Frequency
LO Frequency
IF Frequency
I/Q Voltage
UNITS
V
°C
kHz
MHz
MHz
V
MIN
2.7
-20
DC
100
50
V
CC
/2
+1 V
p-p
TYP MAX
3.0
+25
5.5
+70
500
300
150
Notes:
1. Operation in excess of any one of these parameters may result in
permanent damage.
2. Mounted on a 50 x 50 x 1.6 mm epoxy glass PWB (T
A
= +70°C).
TEST CIRCUIT
I SIGNAL
33 nF
1 kΩ 1 kΩ
20
GND
10 nF
5µF
19
NC
18
GND
17
I-BIAS
16
I-BIAS
15
GND
14
I
13
I
12
V
ENABLE
11
V
CC
UPC8101GR
LO BYPASS
IF OUTPUT
LO INPUT
Q-BIAS
Q-BIAS
GND
GND
1
2
3
4
5
6
7
8
9
GND
Q
Q
10
30 pF
1000 pF
50
Ω
LO
INPUT
1000 pF
1 kΩ 1 kΩ
33 nF
Q
SIGNAL
IF
OUTPUT
SIGNAL
LO
I Signal
Q Signal
f (MHz)
300.1 MHz
36 kHz
36 kHz
P
IN
-10 dBm
1Vp-p
1 Vp-p
I/Q phase difference = 90
°
For the LO leakage test, I/Q
signal is applied as only DC.
UPC8101GR
OUTLINE DIMENSIONS
(Units in mm)
PACKAGE OUTLINE SSOP20
20
11
LEAD CONNECTIONS
(Top View)
1. LOCAL IN
2. LOCAL IN
3. GND
4. Q-BIAS
5. Q-BIAS
6. GND
7. Q-INPUT
8. Q-INPUT
9. GND
10. IF OUTPUT
11. V
CC
12. V
ENABLE
13. I-INPUT
14. I-INPUT
15. GND
16. I-BIAS
17. I-BIAS
18. GND
19. N.C.
20. GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NEC
C8101G
N
XXXXX
1
7.00 MAX
10
XXXXX = Lot/Date Code
6.4±0.2
4.4±0.1
1.0±0.1
1.5 ±0.1
1.8 MAX
+0.10
0.22 - 0.05
+0.10
0.15- 0.05
0.5±0.2
0.65
0.575 MAX
Note:
All dimensions are typical unless otherwise specified.
ORDERING INFORMATION
PART NUMBER
UPC8101GR-E2
Note:
Embossed Tape, 12 mm wide.
Pin 1 indicates roll-in direction of tape.
QTY
2500/Reel
EXCLUSIVE AGENT FOR
NEC Corporation
RF & MICROWAVE SEMICONDUCTOR PRODUCTS - U.S. & CANADA
CALIFORNIA EASTERN LABORATORIES, INC
·
Headquarters
·
4590 Patrick Henry Drive
·
Santa Clara, CA 95054-1817
·
(408) 988-3500
·
Telex 34-6393/FAX (408) 988-0279
DATA SUBJECT TO CHANGE WITHOUT NOTICE
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