SED1530 Series
OVERVIEW
The SED1530 series is a single-chip LCD driver for dot-matrix
liquid crystal displays (LCD’s) which is directly connectable to a
microcomputer bus. It accepts 8-bit serial or parallel display data
directly sent from a microcomputer and stores it in an on-chip
display RAM. It generates an LCD drive signal independent of
microprocessor clock.
The use of the on-chip display RAM of 65
×
132 bits and a one-to-
one correspondence between LCD panel pixel dots and on-chip
RAM bits permits implementation of displays with a high degree of
freedom.
As a total of 133 circuits of common and segment outputs are
incorporated, a single chip of SED1530 series can make 33
×
100-
dot (16
×
16-dot kanji font: 6 columns
×
2 lines) displays, and a single
chip of SED1531 can make 65
×
132-dot (kanji font: 8 columns x 4
lines) displays when the SED1531 is combined with the common
driver SED1635.
The SED1532 can display the 65
×
200-dot (or 12-column by 4-line
Kanji font) area using two ICs in master and slave modes. As an
independent static indicator display is provided for time-division
driving, the low-power display is realized during system standby
and others.
No external operation clock is required for RAM read/write opera-
tions. Accordingly, this driver can be operated with a minimum
current consumption and its on-board low-current-consumption
liquid crystal power supply can implement a high-performance
handy display system with a minimum current consumption and a
smallest LSI configuration.
Two types of SED1530 series are available: one in which common
outputs are arranged on a single side and the other in which common
outputs are arranged on both sides.
FEATURES
• Direct RAM data display using the display RAM. When
RAM data bit is 0, it is not displayed. When RAM data bit
is 1, it is displayed. (At normal display)
• RAM capacity: 65
×
132 = 8580 bits
• High-speed 8-bit microprocessor interface allowing direct
connection to both the 8080 and 6800.
• Serial interface
• Many command functions: Read/Write Display Data, Dis-
play ON/OFF, Normal/Reverse Display, Page Address Set,
Set Display Start Line, Set Column Address, Read Status,
All Display ON/OFF, Set LCD Bias, Electronic contrast
Controls, Read Modify Write, Select Segment Driver Direc-
tion, Power Save
• Series specifications (in cases of chip shipments)
Type 1 [V
REG
(Built-in power supply regulating voltage)
Temperature gradient: -0.2% /
°C]
Name
SED1530D
0
V
SED1530D
A
V
SED1531D
0
V
SED1532D
0
V
SED1532D
B
V
SED1535D
A
V
Duty
1/33
1/33
1/65
1/65
1/65
1/35
LCD bias
1/5, 1/6
1/5, 1/6
1/6, 1/8
1/6, 1/8
1/6, 1/8
1/5, 1/6
Segment driver
100
100
132
100
100
98
COM driver
33
33
0
33
33
35
Display area
33
×
100
33
×
100
65
×
132
65
×
200
65
×
200
35
×
98
Remarks
COM single-side layout
COM dual-side layout
SED1635 is used as the COM.
COM single-side, right-hand layout
COM single-side, left-hand layout
COM both-side layout
Type 2 [V
REG
Temperature gradient: 0.00% /
°C]
Name
SED1530D
F
V
SED1532D
E
V
SED1533D
F
V
SED1534D
E
V
Duty
1/33
1/65
1/17
1/9
LCD bias
1/5, 1/6
1/6, 1/8
1/5
1/5
Segment driver
100
100
116
124
COM driver
33
33
17
9
Display area
33
×
100
65
×
200
17
×
116
9
×
124
Remarks
COM both-side layout
COM single-side, right-hand layout
COM both-side layout
COM single-side layout
Note: The SED1530 series has the following subcodes depending on their shapes. (The SED1530 examples are given.)
SED1530T**
: TCP (The TCP subcode differs from the inherent chip subcode.)
SED1530D**
: Bear chips
SED1530D*
A
: Aluminum pad
SED1530D*
B
: Gold bump
• On-chip LCD power circuit: Voltage booster, voltage
regulator, voltage follower
×
4.
• On-chip electronic contrast control functions
• Ultra low power consumption
• Power supply voltages: V
DD
- V
SS
-2.4 V to -6.0 V
V
DD
- V5 -4.5 V to -16.0 V
• Wide operating temperature range:
Ta = -40 to 85°C
• CMOS process
• Package: TCP and bare chip
• Non-radiation-resistant design
EPSON
5–1
SED1530 Series
PIN DESCRIPTION
Power Supply
Name
V
DD
V
SS
V
1
, V
2
V
3
, V
4
V
5
I/O
Supply
Supply
Supply
Description
+5V power supply. Connect to microprocessor power supply pin V
CC
.
Ground
LCD driver supply voltages. The voltage determined by LCD cell is
impedance-converted by a resistive driver or an operational amplifier
for application. Voltages should be the following relationship:
V
DD
≥
V
1
≥
V
2
≥
V
3
≥
V
4
≥
V
5
When the on-chip operating power circuit is on, the following voltages
are given to V
1
to V
4
by the on-chip power circuit. Voltage selection is
performed by the Set LCD Bias command. (The SED1533 and SED1534
are fixed to 1/5 bias.)
SED1530/SED1535
V
1
V
2
V
3
V
4
1/5•V
5
2/5•V
5
3/5•V
5
4/5•V
5
1/6•V
5
2/6•V
5
4/6•V
5
5/6•V
5
SED1531
1/6•V
5
2/6•V
5
4/6•V
5
5/6•V
5
1/8•V
5
2/8•V
5
6/8•V
5
7/8•V
5
SED1532
1/6•V
5
2/6•V
5
4/6•V
5
5/6•V
5
1/8•V
5
2/8•V
5
6/8•V
5
7/8•V
5
Number of pins
2
1
6
SED1533
V
1
V
2
V
3
V
4
1/5•V
5
2/5•V
5
3/5•V
5
4/5•V
5
SED1534
1/5•V
5
2/5•V
5
3/5•V
5
4/5•V
5
LCD Driver Supplies
Name
CAP1+
CAP1–
CAP2+
CAP2–
CAP3–
V
OUT
VR
I/O
O
O
O
O
O
O
I
Description
DC/DC voltage converter capacitor 1 positive connection
DC/DC voltage converter capacitor 1 negative connection
DC/DC voltage converter capacitor 2 positive connection
DC/DC voltage converter capacitor 2 negative connection
DC/DC voltage converter capacitor 1 negative connection
DC/DC voltage converter output
Voltage adjustment pin. Applies voltage between V
DD
and V5 using
a resistive divider.
Number of pins
1
1
1
1
1
1
1
Microprocessor Interface
Name
D0 to D7
(SI)
(SCL)
A0
I
I/O
I/O
Description
8-bit bi-directional data bus to be connected to the standard 8-bit or 16-bit
microprocessor data bus.
When the serial interface selects;
D7: Serial data input (SI)
D6: Serial clock input (SCL)
Control/display data flag input. It is connected to the LSB of micro-
processor address bus. When low, the data on D0 to D7 is control data.
When high, the data on D0 to D7 is display data.
When RES is caused to go low, initialization is executed.
A reset operation is performed at the RES signal level.
I
I
Chip select input. Data input/output is enabled when -CS1 is low and
CS2 is high. When chip select is non-active, D0 to D7 will be "HZ".
• When interfacing to an 8080 series microprocessor:
Active low. This input connects the RD signal of the 8080 series
microprocessor. While this signal is low, the SED1530 series data
bus output is enabled.
• When interfacing to a 6800 series microprocessor:
Active high. This is used as an enable clock input pin of the 6800 series
microprocessor.
Number of pins
8
1
RES
CS1
CS2
RD
(E)
1
2
1
EPSON
5–5
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