UPC1862 datasheet, PDF - EEWORLD Datasheet

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UPC1862: DescriptionBURST LOCK CLOCK GENERATOR; File Size160KB，32 Pages; ManufacturerNEC ( Renesas ); Websitehttps://www2.renesas.cn/zh-cn/

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UPC1862 Overview

BURST LOCK CLOCK GENERATOR

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DATA SHEET

BIPOLAR ANALOG INTEGRATED CIRCUIT

PC1862

BURST LOCK CLOCK GENERATOR

The

PC1862 is an LSI incorporating a PLL circuit to generate nf

clocks (f

: color subcarrier frequency), ideal

for the processing of digital video signals as in extended definition television (EDTV) systems.

FEATURES

• VCO is incorporated.

• Horizontal and vertical sync separation circuits are incorporated (with output pins).

• Horizontal and vertical sync output pulses (TTL level)

• ACC amplifier and killer detector circuits are incorporated.

• 1/4 and 1/8 (1/2

1/4) frequency dividers are incorporated.

• f

phase control circuits is incorporated.

• Applicable to both NTSC and PAL systems.

• Possible to input burst gate pulse from external

ORDERING INFORMATION

Part number

Package

36-pin plastic shrink SOP (300 mil)

PC1862GS

The information in this document is subject to change without notice.

Document No. S11431EJ3V0DS00 (3rd edition)

Date Published December 1997 N CP(K)

Printed in Japan

The mark

shows major revised points.

1991, 1996

UPC1862 Related Products

	UPC1862	UPC1862GS
Description	BURST LOCK CLOCK GENERATOR	BURST LOCK CLOCK GENERATOR

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