MP38876
10A, 28V, High Frequency Step-Down
Converter with Synchronous Gate Driver
The Future of Analog IC Technology
DESCRIPTION
The MP38876 is a monolithic step-down switch
mode converter with a built in internal power
MOSFET. It achieves 10A continuous output
current over a wide input supply range with
excellent load and line regulation.
Current mode operation provides fast transient
response and eases loop stabilization.
Fault condition protection includes cycle-by-cycle
current limiting and thermal shutdown.
The MP38876 requires a minimum number of
readily available standard external components
and is available in a 20-pin 3mm x 4mm QFN
package.
The MP38876 is ideal for a wide range of
applications including distributed power systems,
pre-regulator for linear regulators, compact DC-
DC regulators for PCB space limited platforms.
FEATURES
•
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•
•
•
•
•
•
•
•
•
•
•
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•
•
•
•
Wide 4.5V to 28V Operating Input Range
10A Output Current
18mΩ Internal Power MOSFET Switch
Synchronous Gate Driver Delivers up to
95% Efficiency
Synch from 300HKz to > 1MHz External Clock
Synch Output to Drive Another Regulator in
Phase-Shift Operation
Default 600KHz / 1.2MHz Switching Frequency
Feedback Voltage Accuracy: 1.5%
Programmable Soft-Start
Startup Tracking
EN and Power Good for Power Sequencing
Cycle-by-Cycle Over Current Protection
Thermal Shutdown
Output Adjustable from 0.8V to 15V
Stable with Low ESR Output Ceramic
Capacitors
Available in a 3mm x 4mm QFN Package
Distributed Power Systems
Pre-Regulator for Linear Regulators
Compact DC-DC Regulator for PCB Space
Limited Platforms
APPLICATIONS
“MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic
Power Systems, Inc.
TYPICAL APPLICATION
V3P3
System
V
IN
IN
PG
BST
SW
COMP
VCC
SS/TRK
BG
V
OUT
2.5V @ 10A
MP38876
FB
OFF ON
EN
SYNCIN
SYNCOUT
GND
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
1
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PACKAGE REFERENCE
TOP VIEW
PIN 1 ID
GND GATE VIN
20
VCC
SYNCOUT
SYNCIN
EN
SS/TRK
FB
COMP
1
2
3
4
5
6
7
8
9
10
PG BST VIN
VIN
19
18
17
16
15
14 SW
13
12
11
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage V
IN
....................................... 30V
V
SW
....................................... –0.3V to V
IN
+ 0.3V
V
BS
....................................................... V
SW
+ 6V
All Other Pins................................. –0.3V to +6V
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature ..............–65°C to +150°C
Recommended Operating Conditions
(2)
Supply Voltage V
IN
........................... 4.5V to 28V
Output Voltage V
OUT
................... 0.8V to V
IN
-7V
Operating Temperature .............–40°C to +85°C
Thermal Resistance
(3)
QFN (3mm x 4mm) ................. 48 ...... 11...
°C/W
Temperature
–40°C to +85°C
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
θ
JA
θ
JC
Part Number*
MP38876DN
*
Package
3mm x 4mm
QFN
For Tape & Reel, add suffix –Z (eg. MP38876DN–Z)
For RoHS compliant packaging, add suffix –LF
(eg. MP38876DN–LF–Z)
ELECTRICAL CHARACTERISTICS
V
IN
= 12V, T
A
= +25°C, unless otherwise noted.
Parameters
Feedback Voltage
Feedback Current
Switch On Resistance
(4)
Switch Leakage
Current Limit
(4)
Oscillator Frequency
Fold-back Frequency
Maximum Duty Cycle
Minimum On Time
Soft-Start Charging Current
COMP Threshold for Switching
Maximum COMP Level
Gain of Error Amplifier
Error Amplifier Sink Current
Error Amplifier Source Current
Gain of Internal Current Sense
Slope Compensation
Power Good Ramp Up Threshold
Power Good Ramp Down Threshold
MP38876 Rev. 0.1
9/21/2007
Symbol
V
FB
I
FB
R
DS(ON)
Condition
4.5V
≤
V
IN
≤
28V
V
FB
= 0.8V
V
EN
= 0V, V
SW
= 0V
Min
0.798
Typ
0.810
10
18
0
15
600
150
90
100
2.2
TBD
TBD
2.4
–200
+200
TBD
TBD
90
85
Max
0.822
Units
V
nA
mΩ
μA
A
KHz
KHz
%
ns
μA
V
V
mA/V
μA
μA
A/V
V
%
%
2
12
f
SW
V
FB
= 0.6V, SYNC
IN
= 5V
V
FB
= 0V
V
FB
= 0.6V
V
FB
= 1V
V
SS
= 0V
V
FB
= 0.6V
V
COMP
= 1.5V
V
COMP
= 1.5V
V
COMP
= 1.5V
10
18
t
ON
I
SS
V
COMP_LOW
V
COMP_MAX
G
EA
G
CS
V
SLOPE
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
ELECTRICAL CHARACTERISTICS
V
IN
= 12V, T
A
= +25°C, unless otherwise noted.
Parameters
Power Good Delay
Power Good Sink Current Capability
Power Good Leakage Current
V
CC
Tolerance
V
CC
Regulation
Sync Frequency
SYNCIN Bias Current
SYNCIN Logic High Voltage
SYNCIN Logic Low Voltage
SYNCHOUT High Level
SYNCHOUT Low Level
Under Voltage Lockout Threshold Rising
Under Voltage Lockout Threshold Hysteresis
EN Input Low Voltage
En Input High Voltage
EN Input Current
Supply Current (Shutdown)
Supply Current (Quiescent)
Thermal Shutdown
Gate Driver Sink Impedance
Gate Driver Source Impedance
Gate Drive Current Sense Trip Threshold
Gate Drive Non-Overlap Time
(see Figure 1)
Note:
4) Guaranteed by design.
Symbol Condition
V
PG
I
PG_LEAK
V
CC
F
SYNC
I
SYNCIN
Sink 4mA
V
PG
= 3.3V
I
CC
= 0mA
I
CC
= 0~20mA
Min
Typ
20
Max
0.4
10
5.5
TBD
4.5
0.3
5
5
10
1.2
0.4
V
CC
= 5V, Source
5mA
V
CC
= 5V, Sink 5mA
3.75
4.6
0.4
4.0
880
4.25
0.4
1.2
V
EN
= 2V
V
EN
= 0V
V
EN
=
0V
V
EN
=
2V, V
FB
= 1V
R
SINK
R
SOURCE
T
d1
T
d2
From BG low to SW
high
From SW low to BG
high
2
0
0
1.2
150
1
4
20
10
10
Units
μs
V
nA
V
%
MHz
nA
V
V
V
V
V
mV
V
V
μA
μA
mA
°C
Ω
Ω
mV
ns
ns
V
BG
1V
1V
V
SW
Td1
1V
1V
Td2
Figure 1—Gate Drive Non-Overlap Time Diagram
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
3
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PIN FUNCTIONS
Pin #
1
Name
VCC
Description
BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor.
Timing output to drive another MP38876 (or similar device) SYNCIN for phase-shift
2
SYNCOUT
operation.
External Frequency Synchronization / Frequency Select Input. Connect to V
CC
for
3
SYNCIN
600KHz or connect to ground for 1.2MHz.
4
EN
On/Off Control.
5
SS/TRK Soft-Start/Track Input. Connect a capacitor to ground.
Feedback. An external resistor divider from the output to GND, tapped to the FB pin,
sets the output voltage. To prevent current limit run away during a short circuit fault
6
FB
condition the frequency foldback comparator lowers the oscillator frequency when the
FB voltage is below 400mV.
7
COMP
Compensation. Connect R/C network to ground.
Power Good Indicator. The output of this pin is an open drain if the output voltage is
within 10% of the nominal voltage, otherwise it is LOW. Optional: If PG is initially at
8
PG
open drain, there is a 20µs delay to pull PG if the output voltage is less than 10%
regulation window.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
9
BST
voltage. It is connected between SW and BS pins to form a floating supply across the
power switch driver.
10, 18,
Supply Voltage. The MP38876 operates from a +4.5V to +28V unregulated input. C1
VIN
Exposed Pad
is needed to prevent large voltage spikes from appearing at the input.
11-17
SW
Switch Output. These pins are fused together.
19
GATE
Gate Driver Output. Connect this pin to the synchronous MOSFET.
20
GND
Ground.
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
4
MP38876 – 10A, 28V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
OPERATION
The MP38876 is a current mode buck regulator.
That is, the EA output voltage is proportional to
the peak inductor current.
At the beginning of a cycle, SW is off. The EA
output voltage is higher than the current sense
amplifier output, and the current comparator’s
output is low. The rising edge of the 600KHz
CLK signal sets the RS Flip-Flop. Its output
turns on SW thus connecting the SW pin and
inductor to the input supply.
The increasing inductor current is sensed and
amplified by the Current Sense Amplifier. Ramp
compensation is summed to Current Sense
Amplifier output and compared to the Error
Amplifier output by the Current Comparator.
When the sum of the Current Sense Amplifier
and the Slope Compensation signal exceeds
the EA output voltage, the RS Flip-Flop is reset
and the MP38876 reverts to its initial SW off
state.
SYNCIN
IN
D
CURRENT SENSE
AMPLIFIER
If the sum of the Current Sense Amplifier and
the Slope Compensation signal does not
exceed the COMP voltage, then the falling edge
of the CLK resets the Flip-Flop.
The output of the Error Amplifier integrates the
voltage difference between the feedback and
the 0.8V bandgap reference. The polarity is
such that a FB pin voltage lower than 0.8V
increases the EA output voltage. Since the EA
output voltage is proportional to the peak
inductor current, an increase in its voltage
increases current delivered to the output.
An external synchronous MOSFET supplies the
inductor current when the switch is off.
SYNCOUT
V
CC
REGULATOR
EN
REGULATOR
OSCILLATOR
600KHz / 1.2MHz
S
+
--
CURRENT
LIMIT
COMPARATOR
Q
R
R
Q
SW
V
CC
VCC
DRIVER
I
SS
SS/TRK
REFERENCE
V
BC
+
--
+
--
V
FB
FB
ERROR
AMPLIFIER
PWM
COMPARATOR
COMP
Figure 2—Functional Block Diagram
MP38876 Rev. 0.1
9/21/2007
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2007 MPS. All Rights Reserved.
+
--
BST
DRIVER
BG
GND
PG
V
FB
V
BG
Power
Good
5
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