DUAL UNIVERSAL ASYNCHRONOUS
RECEIVER AND TRANSMITTER
August 2016
XR88C92/192
DESCRIPTION
The XR88C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 (XR88C92) / 16 (XR88C192)
bytes transmit and receive FIFO. The XR88C92/192 is a pin and functional replacement for the SC26C92 and an
improved version of the Philips SCC2692 UART with faster data access and other additional features. The operating
speed of the receiver and transmitter can be selected independently from a table of eighteen fixed baud rates, a 16X
clock derived from a programmable counter/timer, or an external 1X or 16X clock. The baud rate generator and counter/
timer can operate directly from a crystal or from external clock input. The XR88C92/192 provides a power-down mode
in which the oscillator is stopped but the register contents are retained. The XR88C92/192 is fabricated in an advanced
CMOS process to achieve low power and high speed requirements.
FEATURES
Added features in devices with top marking of "D2" and
newer:
5 volt tolerant inputs
Pin to pin and functional compatible to SC26C92
Enhanced Multidrop mode operation with separate
storage for address and data tags (9th bit)
8 Bytes transmit/receive FIFO (XR88C92)
16 Bytes transmit/receive FIFO (XR88C192)
Standard baud rates from 50bps to 230.4kbps
Non-standard baud rate of up to 1Mbps
Transmit and Receive trigger levels
Watch dog timer
Programmable clock source for receiver and transmit-
ter of each channel
Single interrupt output
7 Multipurpose inputs, 8 Multipurpose outputs
2.97 to 5.5 volt operation
Programmable character lengths (5, 6, 7, 8)
Parity, framing, and over run error detection
Programmable 16-bit timer/counter
On-chip crystal oscillator
Power down mode
PLCC Package
ORDERING INFORMATION
Part Number
(Tape & Reel)
XR88C92CJTR-F
XR88C92CVTR-F
XR88C92IJTR-F
XR88C92IVTR-F
XR88C192CJTR-F
XR88C192CVTR-F
XR88C192IJTR-F
XR88C192IVTR-F
Part Number
XR88C92CJ-F
XR88C92CV-F
XR88C92IJ-F
XR88C92IV-F
XR88C192CJ-F
XR88C192CV-F
XR88C192IJ-F
XR88C192IV-F
Package
44-Lead PLCC
44-Lead LQFP
44-Lead PLCC
44-Lead LQFP
44-Lead PLCC
44-Lead LQFP
44-Lead PLCC
44-Lead LQFP
Operating Temperature
0° C to + 70° C
0° C to + 70° C
-40° C to + 85° C
-40° C to + 85° C
0° C to + 70° C
0° C to + 70° C
-40° C to + 85° C
-40° C to + 85° C
Note:
Refer to website for most up-to-date ordering information.
Rev. 1.34
EXAR
Corporation, 48720 Kato Road, Fremont, CA 94538
(510) 668-7000
FAX (510) 668-7017
XR88C92/192
Package Description
44 Pin LQFP Package
Rev. 1.34
2
XR88C92/192
Block Diagram
Rev. 1.34
3
XR88C92/192
SYMBOL DESCRIPTION
Symbol
PLCC-44
RXA, RXB
35,11
Pin
Signal
LQFP-44 Type
29,5
I
Pin Description
Serial data input. The serial information (data) received from
serial port to XR88C92/192 receive input circuit. A mark (high)
is logic one and a space (low) is logic zero.This input must
be held at logic one when idle and during power down.
Serial data output. The serial data is transmitted via this pin
with additional start , stop and parity bits. This output will be
held in mark (high) state during reset, local loop back mode
or when the transmitter is disabled.
Master Reset (active high). A high on this pin will reset all the
outputs and internal registers. The transmitter output and
the receiver input will be disabled during reset time.
Multi-purpose output. General purpose output or Channel A
Request-To-Send (-RTSA active low).
Multi-purpose output. General purpose output or Channel B
Request-To-Send (-RTSB active low).
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bits 1,0;
TxAClk1
-Transmit 1X clock.
TxAClk16
-Transmit 16X clock
RxAClk1
-Receive 1X clock
TXA, TXB
33,13
28,6
O
RESET
38
32
I
OP0
OP1
OP2
32
14
31
27
7
26
O
O
O
OP3
15
8
O
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bits 3,2;
C/T
-Counter timer output (Open drain output)
TxBClk1
-Transmit 1X clock
RxBClk1
-Receive 1X clock
OP4
30
25
O
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bit 4;
-RxARDY -Receive ready signal (Open drain output)
-RxAFULL
- Receive FIFO full signal (Open drain output)
Rev. 1.34
4
XR88C92/192
SYMBOL DESCRIPTION
Symbol
PLCC-44
OP5
16
Pin
Signal
LQFP-44 Type
9
O
Pin Description
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bit 5;
-RxBRDY - Receive ready signal (Open drain output)
-RxBFULL
- Receive FIFO full signal (Open drain output)
OP6
29
24
O
Multi-purpose output. General purpose output or Transmit A
holding register empty interrupt (-TxARDY Open drain out-
put).
Multi-purpose output. General purpose output or Transmit B
holding register empty interrupt (-TxBRDY Open drain output)
Address select lines. To select internal registers.
Crystal input 1 or external clock input. A crystal can be
connected between this pin and XTAL2 pin to utilize the
internal oscillator circuit. An external clock can be used to
clock internal circuit and baud rate generator for custom
transmission rates.
Crystal input 2 or buffered clock output. See XTAL1.
Signal and power ground.
Interrupt output (open drain, active low) This pin goes low
upon occurrence of one or more of eight maskable interrupt
conditions (when enabled by the interrupt mask register).
CPU can read the interrupt status register to determine the
interrupting condition(s). This output requires a pull-up resis-
tor.
Multi-purpose input or Channel A Clear-To-Send (-CTSA
active low).
Multi-purpose input or Channel B Clear-To-Send (-CTSB
active low).
Multi-purpose input or Timer/Counter External clock input.
OP7
A0-A3
XTAL1
17
2,4,
6,7
36
10
40,42,
44,1
30
O
I
I
XTAL2
GND
-INT
37
22
24
31
16,17
18
O
Pwr
O
IP0
IP1
IP2
8
5
40
2
43
34
I
I
I
Rev. 1.34
5
DSP and ARM Processors
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