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UPA1724

Description
SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE
File Size56KB,8 Pages
ManufacturerNEC ( Renesas )
Websitehttps://www2.renesas.cn/zh-cn/
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UPA1724 Overview

SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA1724
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
5
DESCRIPTION
The
µ
PA1724 is N-Channel MOS Field Effect
Transistor designed for power management
applications of notebook computers and so on.
8
PACKAGE DRAWING (Unit : mm)
5
1,2,3 ; Source
; Gate
4
5,6,7,8 ; Drain
FEATURES
2.5-V gate drive and low on-resistance
R
DS(on)1
= 11.0 mΩ MAX. (V
GS
= 4.5 V, I
D
= 5.0 A)
1.44
5
1
5.37 MAX.
4
6.0 ±0.3
4.4
+0.10
–0.05
R
DS(on)2
= 12.0 mΩ MAX. (V
GS
= 4.0 V, I
D
= 5.0 A)
Low C
iss
: C
iss
= 1850 pF TYP.
Built-in G-S protection diode
Small and surface mount package (Power SOP8)
1.8 MAX.
0.8
R
DS(on)3
= 15.0 mΩ MAX. (V
GS
= 2.5 V, I
D
= 5.0 A)
0.15
0.05 MIN.
0.5 ±0.2
0.10
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power SOP8
µ
PA1724G
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
EQUIVALENT CIRCUIT
Drain
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
20
±12
±10
±40
2.0
150
–55 to +150
V
V
A
A
W
°C
°C
Gate
Protection
Diode
Source
Gate
Body
Diode
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Notes 1.
PW
10
µ
s, Duty Cycle
1 %
2.
Mounted on ceramic substrate of 1200 mm x 2.2 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
2
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G14048EJ1V0DS00 (1st edition)
Date Published January 2000 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
©
1999, 2000

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