PE42823
Document Category: Product Specification
UltraCMOS® SPDT RF Switch, 700 MHz–6 GHz
Features
• Excellent single-event peak power handling of
51 dBm LTE
• Exceptional linearity performance across all
frequencies
▪
Input IP3: 70 dBm
▪
Input IP2: 105 dBm
• Extended operating temperature of +105 °C
• 1.8V/3.3V TTL compatible control
• High ESD performance of 4.5 kV HBM on RF pins
to ground
• Packaging – 16-lead 3 × 3 × 0.75 mm QFN
Figure 1 •
PE42823 Functional Diagram
ANT (RFC)
TX
(RF1)
R
RX
(
R
(RF2)
CMOS Control
Driver and ESD
CTRL
Applications
• 4G/4.5G wireless infrastructures
• Pre-5G/5G massive MIMO systems
• TDD-based RF transceivers
V
DD
Product Description
The PE42823 is a HaRP™ technology-enhanced 50Ω SPDT RF protection switch designed for use in high
power and high performance wireless infrastructure applications such as macrocells supporting frequencies up
to 6 GHz.
This switch features high linearity, which remains invariant across the full supply range. The PE42823 also
features exceptional isolation, fast switching time and is offered in a 16-lead 3 × 3 × 0.75 mm QFN package. In
addition, no external blocking capacitors are required if 0 VDC is present on the RF ports.
The PE42823 is manufactured on Peregrine’s UltraCMOS
®
process, a patented advanced form of silicon-on-
insulator (SOI) technology.
Peregrine’s HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an
innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and
integration of conventional CMOS.
©2015 – 2017, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121
Product Specification
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DOC-67417-4 – (05/2017)
PE42823
SPDT RF Switch
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in
Table 1
may cause permanent damage. Operation should be
restricted to the limits in
Table 2.
Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in
Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 •
Absolute Maximum Ratings for PE42823
Parameter
Power supply voltage
Voltage on CTRL input
Voltage on LS input
Storage temperature range
Input power, avg:
700 –1800 MHz
1801–3800 MHz
3801–6000MHz
ESD voltage HBM:
RF pins to GND
All pins
ESD voltage CDM, all pins
Charged device model
(JEDEC JESD22-C101).
Human body model
(MIL-STD 883 Method 3015).
4500
4000
1250
V
V
V
Tx mode, 10-second duration,
8dB PAR LTE signal
No power applied to off-
terminated port. No hot switching.
43
42.5
42
dBm
dBm
dBm
Condition
Min
–0.3
–0.3
–0.3
–65
Typ
Max
5.5
3.6
3.6
150
Unit
V
V
V
°C
Page 2
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DOC-67417-4 – (05/2017)
PE42823
SPDT RF Switch
Recommended Operating Conditions
Table 2
lists the recommending operating conditions for the PE42823. Devices should not be operated outside
the recommended operating conditions listed below.
Table 2 •
Recommended Operating Conditions for PE42823
Parameter
Power supply voltage
Power supply current
Control voltage high
Control voltage low
Control current
Operating temperature range
–40
+25
1.17
–0.3
Min
2.3
Typ
Max
5.5
Unit
V
µA
V
V
µA
°C
120
200
3.6
0.6
10
+105
DOC-67417-4 – (05/2017)
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Page 3
PE42823
SPDT RF Switch
Electrical Specifications
Table 3
provides the PE42823 key electrical specifications @ +25 °C, V
DD
= 2.3–5.5V, unless otherwise
specified.
Table 3 •
PE42823 Electrical Specifications
Parameter
Operational frequency
700 MHz
2100 MHz
2700 MHz
3800 MHz
6000 MHz
700 MHz
2100 MHz
2700 MHz
3800 MHz
6000 MHz
700 MHz
2100 MHz
2700 MHz
3800 MHz
6000 MHz
700 MHz
2100 MHz
2700 MHz
3800 MHz
6000 MHz
700–2700 MHz
2701–3800 MHz
3800–6000 MHz
700–2700 MHz
2701–3800 MHz
3800–6000 MHz
700–3800 MHz
3801–6000 MHz
58
46
42
37
30
47
36
33
28
22
Path
Condition
Min
700
Typ
0.39
0.51
0.55
0.68
1.28
0.25
0.33
0.36
0.41
0.53
59
47
43
38
31
48
37
34
29
23
24
17
12
26
26
28
46
43
70
105
Max
6000
0.50
0.60
0.70
0.85
1.80
0.35
0.45
0.50
0.60
0.80
Unit
MHz
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
dBm
ANT–RX
Insertion loss
ANT–TX
ANT–RX
Isolation
ANT–TX
ANT–RX
Return loss
ANT–TX
Input 1dB compression
Input IP3
Input IP2
Max RF input power
Settling time
Settling time
Switching time
ANT–TX
ANT–RX
ANT–RX
Tx mode
Rx mode
Continuous Wave, –40°C to 105°C
Continuous Wave, –40°C to 105°C
50% CTRL to 0.05 dB final value
(–40°C to +105°C) Rising Edge
50% CTRL to 0.05 dB final value
(–40°C to +105°C) Falling Edge
2
0.58
0.84
0.62
38.5
33
dBm
dBm
µs
µs
µs
µs
ANT–RX
ANT–TX
50% CTRL to 90% or 10% of final value
50% CTRL to 90% or 10% of final value
Page 4
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DOC-67417-4 – (05/2017)
PE42823
SPDT RF Switch
Control Logic
Table 4
provides the control logic truth table for the
PE42823.
Table 5 •
Pin Descriptions for PE42823
Pin No.
1, 3, 4, 5, 6,
8, 9, 10, 12,
13
2
7
11
14
15
16
Pin
Name
GND
TX
ANT
RX
CTRL
NC
V
DD
Ground.
Description
Table 4 •
Truth Table for PE42823
CTRL
0
1
ANT–TX
OFF
ON
ANT–RX
ON
OFF
TX RF port.
ANT RF port.
RX RF port.
Digital control logic input.
NC
Positive power supply voltage.
Pin Information
This section provides pinout information for the
PE42823.
Figure 2
shows the pin map of this device
for the available package.
Table 5
provides a
description for each pin.
Figure 2 •
Pin Configuration (Top View)
GND
Pin 1 Dot
Marking
Note: *
RF pins 2, 7 and 11 must be at 0 VDC. The RF pins do not
require DC blocking capacitors for proper operation if the 0 VDC require-
ment is met.
16
15
14
CTRL
V
DD
NC
GND
TX
GND
GND
13
1
2
3
4
12
11
10
9
GND
RX
GND
GND
Exposed
Ground Pad
5
6
7
GND
GND
ANT
DOC-67417-4 – (05/2017)
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GND
8
Page 5
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