PD - 97172
IRF7854PbF
Applications
l
Primary Side Switch in Bridge or two-
switch forward topologies using 48V
(±10%) or 36V to 60V ETSI range inputs.
l
Secondary Side Synchronous
Rectification Switch for 12Vout
l
Suitable for 48V Non-Isolated
Synchronous Buck DC-DC Applications
Benefits
l
Low Gate to Drain Charge to Reduce
Switching Losses
l
Fully Characterized Capacitance Including
Effective C
OSS
to Simplify Design,
(See App. Note AN1001)
l
Fully Characterized Avalanche Voltage
and Current
HEXFET
®
Power MOSFET
V
DSS
80V
R
DS(on)
max
13.4m:@VGS = 10V
I
D
10A
S
S
S
G
1
2
3
4
8
7
A
A
D
D
D
D
6
5
Top View
SO-8
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
dv/dt
T
J
T
STG
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Peak Diode Recovery dv/dt
Operating Junction and
Max.
80
± 20
10
7.9
79
2.5
0.02
11
-55 to + 150
Units
V
A
c
W
W/°C
V/ns
°C
h
Storage Temperature Range
Thermal Resistance
Parameter
R
θJL
R
θJA
Junction-to-Drain Lead
Junction-to-Ambient (PCB Mount)
Typ.
Max.
20
50
Units
°C/W
ei
–––
–––
Notes
through
are on page 8
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1
01/05/06
IRF7854PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
80
–––
–––
3.0
–––
–––
–––
–––
–––
0.095
11
–––
–––
–––
–––
–––
–––
–––
13.4
4.9
20
250
100
-100
nA
V
mΩ
V
µA
Conditions
V
GS
= 0V, I
D
= 250µA
V
GS
= 10V, I
D
= 10A
V
DS
= 80V, V
GS
= 0V
V
DS
= 80V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
V/°C Reference to 25°C, I
D
= 1mA
V
DS
= V
GS
, I
D
= 100µA
f
Dynamic @ T
J
= 25°C (unless otherwise specified)
Parameter
gfs
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Min. Typ. Max. Units
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
27
7.7
8.7
9.4
8.5
15
8.6
1620
350
86
1730
230
410
–––
41
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
pF
ns
nC
S
I
D
= 6.0A
V
DS
= 40V
V
GS
= 10V
V
DD
= 40V
I
D
= 6.0A
R
G
= 6.2Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
Conditions
V
DS
= 25V, I
D
= 6.0A
f
f
ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 64V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 64V
Max.
110
6.0
g
Avalanche Characteristics
E
AS
I
AR
Ã
d
Units
mJ
A
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
43
76
2.3
A
79
1.3
65
110
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
G
S
D
Ã
p-n junction diode.
T
J
= 25°C, I
S
= 6.0A, V
GS
= 0V
T
J
= 25°C, I
F
= 6.0A, V
DD
= 25V
di/dt = 100A/µs
f
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF7854PbF
100
TOP
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
100
TOP
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
5.0V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
10
10
BOTTOM
1
BOTTOM
0.1
1
5.0V
0.01
5.0V
≤
60µs PULSE WIDTH
Tj = 25°C
0.001
0.1
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
0.1
0.1
1
≤
60µs PULSE WIDTH
Tj = 150°C
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
ID = 10A
VGS = 10V
10
T J = 150°C
1.5
T J = 25°C
1
VDS = 25V
≤60µs
PULSE WIDTH
0.1
4
5
6
7
8
1.0
0.5
-60 -40 -20 0
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
vs. Temperature
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3
IRF7854PbF
100000
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
12.0
ID= 6.0A
VGS, Gate-to-Source Voltage (V)
10.0
8.0
6.0
4.0
2.0
0.0
10000
C, Capacitance (pF)
VDS= 64V
VDS= 40V
VDS= 16V
1000
Ciss
Coss
Crss
100
10
1
10
VDS, Drain-to-Source Voltage (V)
100
0
5
10
15
20
25
30
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
T J = 150°C
10
T J = 25°C
1
100
10
100µsec
1
10msec
0.1
T A = 25°C
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
VSD, Source-to-Drain Voltage (V)
Tj = 150°C
Single Pulse
0.01
0
1
10
1msec
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRF7854PbF
10
V
DS
8
ID, Drain Current (A)
R
D
V
GS
R
G
D.U.T.
+
6
-
V
DD
10V
4
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
2
Fig 10a.
Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
T A , Ambient Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Ambient Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
100
10
Thermal Response ( Z thJA )
1
0.1
0.01
0.001
D = 0.50
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
A
τ
τ
3
Ri (°C/W)
4.329
30.099
15.590
τι
(sec)
0.003565
1.1249
34.5
τ
1
τ
2
τ
3
SINGLE PULSE
( THERMAL RESPONSE )
Ci=
τi/Ri
Ci=
τi/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
0.0001
1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
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