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PI6C2408-1WIX

Description
PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, SOIC-16
Categorylogic    logic   
File Size321KB,11 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric View All

PI6C2408-1WIX Overview

PLL Based Clock Driver, 6C Series, 8 True Output(s), 0 Inverted Output(s), PDSO16, 0.150 INCH, SOIC-16

PI6C2408-1WIX Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging codeSOIC
package instructionSOP,
Contacts16
Reach Compliance Codecompliant
ECCN codeEAR99
series6C
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G16
length9.9 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals16
Actual output times8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.4 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.885 mm
minfmax140 MHz
PI6C2408
Zero-Delay Clock Buffer
Features
Maximum rated frequency: 140 MHz
Low cycle-to-cycle jitter
Input to output delay, less than 150ps
External feedback pin allows outputs to be synchronized
to the clock input
5V tolerant CLKIN input
Operates at 3.3V V
DD
Test mode allows bypass of the PLL for system testing
purposes (e.g., IBIS measurements)
Clock frequency multipliers ½x to 4x dependent on option
Packaging (Pb-free and Green available):
-16-pin, 150-mil SOIC (W)
-16-pin 173-mil TSSOP (L)
Description
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability
to distribute eight outputs of up to 140 MHz at 3.3 V. Two banks of
four outputs exist, and, depending on product option ordered, can
supply either reference frequency, prescaled half frequency, or
multiplied 2x or 4x input clock frequencies. The PI6C2408 family has
a power-sparing feature: when input SEL2 is 0, the component will
3-state one or both banks of outputs depending on the state of input
SEL1. A PLL bypass test mode also exists. This product line is
available in high-drive and industrial environment versions.
An external feedback pin is used to synchronize the outputs to the
input; the relationship between loading of this signal and the other
outputs determines the input-output delay.
The PI6C2408 is characterized for both commercial and industrial
operation.
Block Diagram
FB_IN
CLKIN
2
PLL
MUX
OUTA1
OUTA2
OUTA3
OUTA4
2
Option (-2, -3)
PI6C2408 (-1, -1H, -2, -3, -4)
FB_IN
CLKIN
OUTB1
OUTB2
OUTB3
OUTB4
PLL
MUX
OUTA1
OUTA2
OUTA3
SEL2
SEL1
Decode
Logic
2
MUX
PI6C2408-6
OUTB1
OUTB2
OUTB3
OUTB4
OUTA4
Pin Configuration
Option (-3, -4)
SEL1
SEL2
Decode
Logic
CLKIN
OUTA1
OUTA2
VDD
GND
OUTB1
OUTB2
SEL2
16
1
15
2
14
3
16-Pin
4
W, L
13
12
5
11
6
10
7
9
8
FB_IN
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
SEL1
07-0275
1
PS8589J
12/12/07

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