LP2953AIMX datasheet, PDF - EEWORLD Datasheet

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LP2953AIMX: DescriptionIC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, PDSO16, SOIC-16, Fixed/Adjustable Positive Single Output LDO Regulator; CategoryPower/power management The power supply circuit; File Size558KB，18 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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LP2953AIMX Overview

IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, PDSO16, SOIC-16, Fixed/Adjustable Positive Single Output LDO Regulator

LP2953AIMX Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	SOIC-16
Reach Compliance Code	not_compliant
ECCN code	EAR99
Adjustability	FIXED
Maximum drop-back voltage 1	0.8 V
Nominal dropback voltage 1	0.47 V
Maximum absolute input voltage	30 V
JESD-30 code	R-PDSO-G16
JESD-609 code	e0
length	9.9 mm
Maximum grid regulation rate (%/V)	0.0083
Maximum load regulation (%)	0.2%
Humidity sensitivity level	1
Number of functions	1
Output times	1
Number of terminals	16
Working temperatureTJ-Max	125 °C
Working temperature TJ-Min	-40 °C
Maximum output current 1	0.25 A
Maximum output voltage 1	29 V
Minimum output voltage 1	1.23 V
Nominal output voltage 1	5 V
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	235
Certification status	Not Qualified
Regulator type	FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height	1.75 mm
surface mount	YES
technology	BIPOLAR
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Maximum voltage tolerance	1.4%
width	3.9 mm

LP2953AIMX Related Products

	LP2953AIMX	LP2952AIMDC	LP2952AIMX	LP2953AIMWC
Description	IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, PDSO16, SOIC-16, Fixed/Adjustable Positive Single Output LDO Regulator	IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, UUC, DIE, Fixed/Adjustable Positive Single Output LDO Regulator	IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, PDSO16, SOIC-16, Fixed/Adjustable Positive Single Output LDO Regulator	IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.8 V DROPOUT, UUC, WAFER, Fixed/Adjustable Positive Single Output LDO Regulator
Is it Rohs certified?	incompatible	conform to	incompatible	conform to
package instruction	SOIC-16	DIE, DIE OR CHIP	SOIC-16	DIE, WAFER
Reach Compliance Code	not_compliant	compliant	not_compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
Adjustability	FIXED	FIXED	FIXED	FIXED
Maximum drop-back voltage 1	0.8 V	0.8 V	0.8 V	0.8 V
Nominal dropback voltage 1	0.47 V	0.47 V	0.47 V	0.47 V
Maximum absolute input voltage	30 V	30 V	30 V	30 V
JESD-30 code	R-PDSO-G16	X-XUUC-N	R-PDSO-G16	X-XUUC-N
Maximum grid regulation rate (%/V)	0.0083	0.0083	0.0083	0.0083
Maximum load regulation (%)	0.2%	0.2%	0.2%	0.2%
Humidity sensitivity level	1	1	1	1
Number of functions	1	1	1	1
Output times	1	1	1	1
Working temperatureTJ-Max	125 °C	125 °C	125 °C	125 °C
Working temperature TJ-Min	-40 °C	-40 °C	-40 °C	-40 °C
Maximum output current 1	0.25 A	0.25 A	0.25 A	0.25 A
Maximum output voltage 1	29 V	29 V	29 V	29 V
Minimum output voltage 1	1.23 V	1.23 V	1.23 V	1.23 V
Nominal output voltage 1	5 V	5 V	5 V	5 V
Package body material	PLASTIC/EPOXY	UNSPECIFIED	PLASTIC/EPOXY	UNSPECIFIED
encapsulated code	SOP	DIE	SOP	DIE
Encapsulate equivalent code	SOP16,.25	DIE OR CHIP	SOP16,.25	WAFER
Package shape	RECTANGULAR	UNSPECIFIED	RECTANGULAR	UNSPECIFIED
Package form	SMALL OUTLINE	UNCASED CHIP	SMALL OUTLINE	UNCASED CHIP
Peak Reflow Temperature (Celsius)	235	260	235	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Regulator type	FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED/ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
surface mount	YES	YES	YES	YES
technology	BIPOLAR	BIPOLAR	BIPOLAR	BIPOLAR
Terminal form	GULL WING	NO LEAD	GULL WING	NO LEAD
Terminal location	DUAL	UPPER	DUAL	UPPER
Maximum time at peak reflow temperature	30	40	30	40
Maximum voltage tolerance	1.4%	1.4%	1.4%	1.4%
Maker	National Semiconductor（TI ）	National Semiconductor（TI ）	National Semiconductor（TI ）	-
Base Number Matches	-	1	1	1

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Circuit diagram: Fat analyzer circuit schematic_page_3

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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