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LMX2531 High Performance Frequency Synthesizer System with Integrated VCO
September 17, 2010
LMX2531
High Performance Frequency Synthesizer System with
Integrated VCO
General Description
The LMX2531 is a low power, high performance frequency
synthesizer system which includes a fully integrated delta-
sigma PLL and VCO with fully integrated tank circuit. The third
and fourth poles are also integrated and also adjustable. Also
included are integrated ultra-low noise and high precision
LDOs for the PLL and VCO which give higher supply noise
immunity and also more consistent performance. When com-
bined with a high quality reference oscillator, the LMX2531
generates very stable, low noise local oscillator signals for up
and down conversion in wireless communication devices.
The LMX2531 is a monolithic integrated circuit, fabricated in
an advanced BiCMOS process. There are several different
versions of this product in order to accommodate different
frequency bands.
Device programming is facilitated using a three-wire
MICROWIRE Interface that can operate down to 1.8 volts.
Supply voltage range is 2.8 to 3.2 Volts. The LMX2531 is
available in a 36 pin 6x6x0.8 mm Lead-Free Leadless Lead-
frame Package (LLP).
Features
■
Multiple Frequency Options Available
—
See Selection Guide Below
—
Frequencies from: 553 MHz - 3132 MHz
■
PLL Features
—
Fractional-N Delta Sigma Modulator Order
programmable up to 4th order
—
FastLock/Cycle Slip Reduction with Timeout Counter
—
Partially integrated, adjustable Loop Filter
—
Very low phase noise and spurs
■
VCO Features
—
Integrated tank inductor
—
Low phase noise
■
Other Features
—
2.8 V to 3.2 V Operation
—
Low Power-Down Current
—
1.8 V MICROWIRE Support
—
Package: 36 Lead LLP
Part
LMX2531LQ1146E
LMX2531LQ1226E
LMX2531LQ1312E
LMX2531LQ1415E
LMX2531LQ1500E
LMX2531LQ1515E
LMX2531LQ1570E
LMX2531LQ1650E
LMX2531LQ1700E
LMX2531LQ1742
LMX2531LQ1778E
LMX2531LQ1910E
LMX2531LQ2080E
Low Band
553 - 592 MHz
592 - 634 MHz
634 - 680 MHz
680 - 735 MHz
749.5 - 755 MHz
725 - 790 MHz
765 - 818 MHz
795 - 850 MHz
831 - 885 MHz
880 - 933 MHz
863 - 920 MHz
917 - 1014 MHz
952 - 1137 MHz
High Band
1106 - 1184 MHz
1184 - 1268 MHz
1268 - 1360 MHz
1360 - 1470 MHz
1499 - 1510 MHz
1450 - 1580 MHz
1530 - 1636 MHz
1590 - 1700 MHz
1662 - 1770 MHz
1760 - 1866 MHz
1726 - 1840 MHz
1834 - 2028 MHz
1904 - 2274 MHz
Target Applications
■
3G Cellular Base Stations (WCDMA, TD-
■
■
■
■
■
■
■
■
■
■
SCDMA,CDMA2000)
2G Cellular Base Stations (GSM/GPRS, EDGE,
CDMA1xRTT)
Wireless LAN
Broadband Wireless Access
Satellite Communications
Wireless Radio
Automotive
CATV Equipment
Instrumentation and Test Equipment
RFID Readers
Data Converter Clocking
LMX2531LQ2265E 1089 - 1200 MHz 2178 - 2400 MHz
LMX2531LQ2570E 1168 - 1395 MHz 2336 - 2790 MHz
LMX2531LQ2820E 1355 - 1462 MHz 2710 - 2925 MHz
LMX2531LQ3010E 1455 - 1566 MHz 2910 - 3132 MHz
© 2010 National Semiconductor Corporation
201011
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LMX2531
Functional Block Diagram
20101101
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2
LMX2531
Connection Diagrams
36-Pin LLP (LQ) Package, D Version
(LMX2531LQ1146E/1226E/1312E/1415E/1515E/2820E/3010E)
20101104
36-Pin LLP (LQ) Package, A Version
(All Other Versions)
20101102
3
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LMX2531
Pin Descriptions
Pin #
1
3
2,4,5,7,
12, 13,
29, 35
6
8
9
10
Pin Name
VccDIG
GND
NC
VregBUF
DATA
CLK
LE
I/O
-
-
-
-
I
I
I
Description
Power Supply for digital LDO circuitry. Input may range from 2.8 - 3.2 V. Bypass capacitors should be
placed as close as possible to this pin and ground.
Ground
No Connect.
Internally regulated voltage for the VCO buffer circuitry. Connect to ground with a capacitor.
MICROWIRE serial data input. High impedance CMOS input. This pin must not exceed 2.75V. Data is
clocked in MSB first. The last bits clocked in form the control or register select bits.
MICROWIRE clock input. High impedance CMOS input. This pin must not exceed 2.75V. Data is clocked
into the shift register on the rising edge.
MICROWIRE Latch Enable input. High impedance CMOS input. This pin must not exceed 2.75V. Data
stored in the shift register is loaded into the selected latch register when LE goes HIGH.
Chip Enable Input. High impedance CMOS input. This pin must not exceed 2.75V. When CE is brought
high the LMX2531 is powered up corresponding to the internal power control bits. Although the part can
be programmed when powered down, it is still necessary to reprogram the R0 register to get the part to
re-lock.
No Connect. Do NOT ground.
Power Supply for VCO regulator circuitry. Input may range from 2.8 - 3.2 V. Bypass capacitors should
be placed as close as possible to this pin and ground.
Internally regulated voltage for VCO circuitry. Not intended to drive an external load. Connect to ground
with a capacitor and some series resistance.
Internal reference voltage for VCO LDO. Not intended to drive an external load. Connect to ground with
a capacitor.
Ground for the VCO circuitry.
Ground for the VCO Output Buffer circuitry.
Buffered RF Output for the VCO.
Power Supply for the VCO Buffer circuitry. Input may range from 2.8 - 3.2 V. Bypass capacitors should
be placed as close as possible to this pin and ground.
Tuning voltage input for the VCO. For connection to the CPout Pin through an external passive loop
filter.
Charge pump output for PLL. For connection to Vtune through an external passive loop filter.
An open drain NMOS output which is used for FastLock or a general purpose output.
Internally regulated voltage for PLL charge pump. Not intended to drive an external load. Connect to
ground with a capacitor.
Power Supply for the PLL. Input may range from 2.8 - 3.2 V. Bypass capacitors should be placed as
close as possible to this pin and ground.
Internally regulated voltage for RF digital circuitry. Not intended to drive an external load. Connect to
ground with a capacitor.
Multiplexed CMOS output. Typically used to monitor PLL lock condition.
Oscillator input.
Oscillator complimentary input. When a single ended source is used, then a bypass capacitor should be
placed as close as possible to this pin and be connected to ground.
This pin is for test purposes and should be grounded for normal operation.
Ground
Internally regulated voltage for LDO digital circuitry.
11
CE
I
14, 15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
31
32
33
34
36
NC
VccVCO
VregVCO
VrefVCO
GND
GND
Fout
VccBUF
Vtune
CPout
FLout
VregPLL1
VccPLL
VregPLL2
Ftest/LD
OSCin
OSCin*
Test
GND
VregDIG
-
-
-
-
-
-
O
-
I
O
O
-
-
-
O
I
I
O
-
-
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