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MT58L128V32F1F-6.8IT

Description
Standard SRAM, 128KX32, 6.8ns, CMOS, PBGA165, FBGA-165
Categorystorage    storage   
File Size631KB,31 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

MT58L128V32F1F-6.8IT Overview

Standard SRAM, 128KX32, 6.8ns, CMOS, PBGA165, FBGA-165

MT58L128V32F1F-6.8IT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCypress Semiconductor
Parts packaging codeBGA
package instructionTBGA,
Contacts165
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time6.8 ns
JESD-30 codeR-PBGA-B165
JESD-609 codee0
length15 mm
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width32
Humidity sensitivity level3
Number of functions1
Number of terminals165
word count131072 words
character code128000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX32
Package body materialPLASTIC/EPOXY
encapsulated codeTBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)220
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width13 mm
PRELIMINARY
4Mb: 256K x 18, 128K x 32/36
FLOW-THROUGH SYNCBURST SRAM
4Mb SYNCBURST
SRAM
FEATURES
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (V
DD
)
• Separate +3.3V or +2.5V isolated output buffer
supply (V
DD
Q)
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL WRITE
• Three chip enables for simple depth expansion
and address pipelining
• Clock-controlled and registered addresses, data
I/Os and control signals
• Internally self-timed WRITE cycle
• Burst control pin (interleaved or linear burst)
• Automatic power-down
• 165-pin FBGA package
• 100-pin TQFP package
• 119-pin BGA package
• Low capacitive bus loading
• x18, x32, and x36 versions available
MT58L256L18F1, MT58L128L32F1,
MT58L128L36F1; MT58L256V18F1,
MT58L128V32F1, MT58L128V36F1
3.3V V
DD
, 3.3V or 2.5V I/O, Flow-Through
100-Pin TQFP
1
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
6.8ns/7.5ns/133 MHz
7.5ns/8.8ns/113 MHz
8.5ns/10ns/100 MHz
10ns/15ns/66 MHz
• Configurations
3.3V I/O
256K x 18
128K x 32
128K x 36
2.5V I/O
256K x 18
128K x 32
128K x 36
• Packages
100-pin TQFP
165-pin FBGA
119-pin, 14mm x 22mm BGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
Part Number Example:
MARKING*
-6.8
-7.5
-8.5
-10
MT58L256L18F1
MT58L128L32F1
MT58L128L36F1
MT58L256V18F1
MT58L128V32F1
MT58L128V36F1
T
F
B
None
IT
119-Pin BGA
2
MT58L256L18F1T-8.5
* A Part Marking Guide for the FBGA devices can be found on Micron’s
web site—http://www.micron.com/support/index.html.
** Industrial temperature range offered in specific speed grades and
configurations. Contact factory for more information.
4Mb: 256K x 18, 128K x 32/36 Flow-Through SyncBurst SRAM
MT58L256L18F1_C.p65 – Rev. 6/01
NOTE:
1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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