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591RD810M000DG

Description
LVPECL Output Clock Oscillator
CategoryPassive components    oscillator   
File Size314KB,12 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric Compare View All

591RD810M000DG Overview

LVPECL Output Clock Oscillator

591RD810M000DG Parametric

Parameter NameAttribute value
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
Installation featuresSURFACE MOUNT
Nominal operating frequency810 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
Output load100 OHM
physical size7.0mm x 5.0mm x 1.8mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
S i 5 9 0 / 5 91
1 ps M
AX
J
I T T E R
C
RYSTAL
O
SC ILLA TOR
(XO)
(10 M H
Z TO
810 MH
Z
)
Features
Available with any-frequency output
frequencies from 10 to 810 MHz
3rd generation DSPLL
®
with superior
jitter performance: 1 ps max jitter
Better frequency stability than SAW-
based oscillators
Internal fundamental mode crystal
ensures high reliability
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
–40 to +85 ºC operating
temperature range
Si5602
Applications
Ordering Information:
See page 7.
SONET/SDH (OC-3/12/48)
Networking
SD/HD SDI/3G SDI video
Test and measurement
Storage
FPGA/ASIC clock generation
Description
The Si590/591 XO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry
to provide a low jitter clock at high frequencies. The Si590/591 supports any
frequency from 10 to 810 MHz. Unlike a traditional XO, where a unique
crystal is required for each output frequency, the Si590/591 uses one fixed
crystal to provide a wide range of output frequencies. This IC based
approach allows the crystal resonator to provide exceptional frequency
stability and reliability. In addition, DSPLL clock synthesis provides superior
supply noise rejection, simplifying the task of generating low jitter clocks in
noisy environments typically found in communication systems. The
Si590/591 IC based XO is factory configurable for a wide variety of user
specifications including frequency, supply voltage, output format, and
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Pin Assignments:
See page 6.
(Top View)
NC
1
6
V
DD
OE
2
5
CLK–
GND
3
4
CLK+
Si590 (LVDS/LVPECL/CML)
OE
1
6
V
DD
Functional Block Diagram
NC
2
5
NC
V
DD
CLK– CLK+
GND
3
4
CLK
17 k
*
Any-rate
10–810 MHz
DSPLL
®
Clock
Synthesis
Si590 (CMOS)
OE
Fixed
Frequency
XO
OE
1
6
V
DD
NC
2
5
CLK–
17 k
*
GND
3
4
CLK+
GND
*Note: Output Enable High/Low Options Available – See Ordering Information
Si591 (LVDS/LVPECL/CML)
Rev. 1.0 8/11
Copyright © 2011 by Silicon Laboratories
Si590/591

591RD810M000DG Related Products

591RD810M000DG 591FC810M000DGR 591FC810M000DG 590FC810M000DGR 590FC810M000DG 591AB810M000DGR 591AB810M000DG 591RD810M000DGR 590RD810M000DG 590EA810M000DG
Description LVPECL Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVDS Output Clock Oscillator LVPECL Output Clock Oscillator LVPECL Output Clock Oscillator LVPECL Output Clock Oscillator LVPECL Output Clock Oscillator LVPECL Output Clock Oscillator
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown unknown unknown unknow
Other features TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TAPE
maximum descent time 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns
Frequency Adjustment - Mechanical NO NO NO NO NO NO NO NO NO NO
frequency stability 7% 20% 20% 20% 20% 25% 25% 7% 7% 50%
Installation features SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT
Nominal operating frequency 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz 810 MHz
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Oscillator type LVPECL LVDS LVDS LVDS LVDS LVPECL LVPECL LVPECL LVPECL LVPECL
Output load 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM 100 OHM
physical size 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm 7.0mm x 5.0mm x 1.8mm
longest rise time 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns 0.35 ns
Maximum supply voltage 2.75 V 2.75 V 2.75 V 2.75 V 2.75 V 3.63 V 3.63 V 2.75 V 2.75 V 2.75 V
Minimum supply voltage 2.25 V 2.25 V 2.25 V 2.25 V 2.25 V 2.97 V 2.97 V 2.25 V 2.25 V 2.25 V
Nominal supply voltage 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V 3.3 V 3.3 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES YES YES YES YES YES YES
maximum symmetry 55/45 % 55/45 % 55/45 % 55/45 % 55/45 % 55/45 % 55/45 % 55/45 % 55/45 % 55/45 %
Maker Silicon Laboratories Inc - - - - Silicon Laboratories Inc Silicon Laboratories Inc Silicon Laboratories Inc Silicon Laboratories Inc Silicon Laboratories Inc
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