TS83C51U2ZZZ-LIBB datasheet, PDF

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TS83C51U2ZZZ-LIBB: DescriptionMicrocontroller, 8-Bit, MROM, 8051 CPU, 30MHz, CMOS, PQCC44, PLASTIC, LCC-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，67 Pages; ManufacturerAtmel (Microchip)

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TS83C51U2ZZZ-LIBB Overview

Microcontroller, 8-Bit, MROM, 8051 CPU, 30MHz, CMOS, PQCC44, PLASTIC, LCC-44

TS83C51U2ZZZ-LIBB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Atmel (Microchip)
Parts packaging code	LCC
package instruction	QCCJ, LDCC44,.7SQ
Contacts	44
Reach Compliance Code	unknown
ECCN code	3A991.A.2
Has ADC	NO
Address bus width	16
bit size	8
CPU series	8051
maximum clock frequency	30 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
JESD-30 code	S-PQCC-J44
length	16.5862 mm
Number of I/O lines	32
Number of terminals	44
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	NO
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC44,.7SQ
Package shape	SQUARE
Package form	CHIP CARRIER
power supply	3/5 V
Certification status	Not Qualified
RAM (bytes)	256
rom(word)	16384
ROM programmability	MROM
Maximum seat height	4.57 mm
speed	30 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	2.7 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	16.5862 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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TS80C51U2

TS83C51U2

TS87C51U2

Double UART 8-bit CMOS Microcontroller

1. Description

TS80C51U2 is high performance CMOS ROM, OTP

and EPROM versions of the 80C51 CMOS single chip

8-bit microcontroller.

The TS80C51U2 retains all features of the 80C51 with

extended ROM/EPROM capacity (16 Kbytes), 256 bytes

of internal RAM, a 7-source , 4-level interrupt system,

an on-chip oscilator and three timer/counters.

In addition, the TS80C51U2 has a second UART,

enhanced functions on both UART, enhanced timer 2,

a hardware watchdog timer, a dual data pointer, a baud

rate generator and a X2 speed improvement mechanism.

The fully static design of the TS80C51U2 allows to

reduce system power consumption by bringing the clock

frequency down to any value, even DC, without loss of

data.

The TS80C51U2 has 2 software-selectable modes of

reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

2. Features

80C52 Compatible

•

8051 pin and instruction compatible

•

Four 8-bit I/O ports

•

Three 16-bit timer/counters

•

256 bytes scratchpad RAM

Asynchronous port reset

Interrupt Structure with

•

7 Interrupt sources

•

4 level priority interrupt system

Full duplex Enhanced UARTs

•

Framing error detection

•

Automatic address recognition

High-Speed Architecture

•

40 MHz @ 5V, 30MHz @ 3V

•

X2 Speed Improvement capability (6 clocks/

machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

Low EMI (inhibit ALE)

Power Control modes

•

Idle mode

•

Power-down mode

•

Power-off Flag

Second UART

Baud Rate Generator

Dual Data Pointer

On-chip ROM/EPROM (16K-bytes)

Programmable Clock Out and Up/Down Timer/

Counter 2

Hardware Watchdog Timer (One-time enabled with

Reset-Out)

Once mode (On-chip Emulation)

Power supply: 4.5-5.5V, 2.7-5.5V

Temperature ranges: Commercial (0 to 70

C) and

Industrial (-40 to 85

Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44

(window), CDIL40 (window)

3. The second UART

In this document, UART_0 will make reference to the

first UART (present in all Atmel Wireless &

Microcontrollers C51 derivatives) and UART_1 will

make reference to the second UART, only present in

the TS80C51U2 part.

The second UART (UART_1) can be seen as an alternate

function of Port 1 (P1.2 or P1.6 for RXD1 and P1.3 or

P1.7 for TXD1) or can be connected to (pin6 or pin12)

and (pin28 or pin34) of 44-pin package (see Pin

Rev. D - 15 January, 2001

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