WED3EG7232S335D3G datasheet, PDF

Datasheet> All Categories > storage> storage> WED3EG7232S335D3G

WED3EG7232S335D3G: DescriptionDDR DRAM Module, 32MX72, 0.7ns, CMOS, ROHS COMPLIANT, DIMM-184; Categorystorage storage; File Size209KB，12 Pages; ManufacturerWhite Electronic Designs Corporation; Websitehttp://www.wedc.com/; Environmental Compliance

Download Datasheet Parametric View All

WED3EG7232S335D3G Overview

DDR DRAM Module, 32MX72, 0.7ns, CMOS, ROHS COMPLIANT, DIMM-184

WED3EG7232S335D3G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	White Electronic Designs Corporation
package instruction	DIMM,
Reach Compliance Code	unknown
access mode	FOUR BANK PAGE BURST
Maximum access time	0.7 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N184
memory density	2415919104 bit
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	184
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

Preview

Download Datasheet

View All

White Electronic Designs

WED3EG7232S-D3

-JD3

PRELIMINARY

256MB – 32Mx72 DDR SDRAM UNBUFFERED

FEATURES

Double-data-rate architecture

DDR200, DDR266, DDR333 amd DDR400

• JEDEC design speciﬁcations

Bi-directional data strobes (DQS)

Differential clock inputs (CK & CK#)

Programmable Read Latency 2, 2.5 (clock)

Programmable Burst Length (2, 4, 8)

Programmable Burst type (sequential & interleave)

Edge aligned data output, center aligned data input.

Auto and self refresh

Serial presence detect

Power supply:

• V

= V

CCQ

= +2.5V ± 0.2V (100, 133 and

166MHz)

• V

= V

CCQ

= +2.6V ± 0.1V (200MHz)

JEDEC 184 pin DIMM package

• JD3 PCB height: 30.48 (1.20") Max

NOTE: Consult factory for availability of:

• Lead-free products

• Vendor source control option

• Industrial temperature option

* This product is under development, is not qualiﬁed or characterized and is subject to

change without notice.

DESCRIPTION

The WED3EG7232S is a 32Mx72 Double Data Rate

SDRAM memory module based on 256Mb DDR SDRAM

components. The module consists of nine 32Mx8 DDR

SDRAMs in 66 pin TSOP packages mounted on a 184

pin FR4 substrate.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges and Burst Lengths allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

OPERATING FREQUENCIES

DDR400 @CL=3

Clock Speed

CL-t

RCD

-t

200MHz

3-3-3

DDR333 @CL=2.5

166MHz

2.5-3-3

DDR266 @CL=2

133MHz

2-2-2

DDR266 @CL=2.5

133MHz

2.5-3-3

DDR200 @CL=2

100MHz

2-2-2

May 2005

Rev. 5

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

Recommended Resources

Sound, light and touch light control circuit diagram

Homemade high-fidelity fever HI-FI amplifier 04

CIC481 audio typical application circuit

Basic circuit of LM337 three-terminal adjustable negative integrated voltage regulator

JDB-LQ-TZ star-delta starting circuit (1)

Photocell light trigger switch

GD32E230C development board download error: After solving the compilation error problem, I encountered the problem of not being able to download. When I clicked to download, the following prompt appeared:Later, through searching on the Internet...; hujj GD32 MCU

Application of seam capacitors in EMI and layout: [color=#000]It is well known that reasonable stacking structure and continuous reference plane can effectively suppress [/color][b]EMI[/b][color=#000] problems, but sometimes the design involves [/col...; ohahaha PCB Design

About the steps of converting .brd to .PCB: Here are some pictures of the specific steps. [b][color=#5E7384]This content was originally created by EEWORLD forum user [size=3]btty038[/size]. If you want to reprint or use it for commercial purpos...; btty038 PCB Design

The op amp waveform is weird: [i=s]This post was last edited by paulhyde on 2014-9-15 04:00[/i] A follower is connected with dual op amp max4016, and then an inverting amplifier is made in the latter stage. The amplification facto...; viper65 Electronics Design Contest

AS8302 measurement range: I am a novice and I am studying AD8302 recently. The manual says that its measurement range is +-30dB. But the manual also says that the two-way input signal range is -60~0dBm. In this case, why is th...; dbtxxq ADI Reference Circuit

Source program of eight-way temperature inspection instrument based on AT89C52: Source code of eight-way temperature inspection instrument based on AT89C52...; yjtyjt 51mcu

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components