MK3727ALF datasheet, PDF - EEWORLD Datasheet

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MK3727ALF: DescriptionClock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8; CategoryThe embedded processor and controller Microcontrollers and processors; File Size98KB，6 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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MK3727ALF Overview

Clock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8

MK3727ALF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Objectid	2147250634
Parts packaging code	SOIC
package instruction	0.150 INCH, SOIC-8
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
compound_id	6718333
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Humidity sensitivity level	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	36 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	18 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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MK3727

OST

24 - 36 MH

3.3 V

OLT

VCXO

Description

The MK3727 series of devices include the original

MK3727S, MK3727A, and the new MK3727C and

MK3727D. The MK3727D and MK3727C are drop-in

replacements for the MK3727S and MK3727A devices.

Compared to these earlier devices the MK3727D and

MK3727C offer a wider operating frequency range and

improved power supply noise rejection. The MK3727D

is recommended for new designs.

The MK3727 series combines the functions of a VCXO

(Voltage Controlled Crystal Oscillator) and PLL (Phase

Locked Loop) frequency doubler onto a single chip.

Used in conjunction with an external pullable quartz

crystal, this monolithic integrated circuit replaces more

costly hybrid (canned) VCXO devices. The MK3727 is

designed primarily for data and clock recovery

applications within end products such as ADSL

modems, set-top box receivers, and telecom systems.

The MK3727D is recommended for new designs. The

MK3727D exhibits a moderate VCXO gain of

120ppm/V typical, when used with a high quality

external pullable quartz crystal. The MK3727C offers a

higher VCXO gain of 150ppm/V, similar to the earlier

MK3727A. The higher intrinsic VCXO gain of the

MK3727C may help compensate for the reduced

pullability of a low quality crystal used in some

applications. However, higher VCXO gain may also

increase clock output phase noise.

The frequency of the on-chip VCXO is adjusted by an

external control voltage input into pin VIN. Because

VIN is a high impedance input, it can be driven directly

from an PWM RC integrator circuit. Frequency output

increases with VIN voltage input. The usable range of

VIN is 0 to 3V.

Features

•

MK3727D and MK3727C are drop-in upgrades to the

earlier MK3727S and MK3727A devices

•

MK3727D and MK3727C offer 24-36 MHz output

frequency range (output frequency = 2x crystal

frequency) and improved power supply noise

rejection

•

Uses an inexpensive 12 to 18 MHz external crystal

•

Ideal for ADSL applications using 17.664 MHz

external pullable crystal to generate locked 35.328

MHz clock physical layer clock

•

Ideal for set-top box applications using 13.5 MHz

external pullable crystal to generate lock 27 MHz

clock transport video clock

•

On-chip VCXO with guaranteed pull range of ±115

ppm minimum (MK3727D)

•

VCXO input tuning voltage 0 to 3.3 V

•

Packaged in 8 pin SOIC (150 mil wide)

MK3727D is Recommended for New Designs.

Block Diagram

VIN

12-18 MHz

Pullable

Crystal

Voltage

Controlled

Crystal

Oscillator

PLL

Frequency

Doubler

24-36 MHz

(2x Crystal Frequency)

MDS 3727 G

I n t e gra te d C i r c u i t S y s t e m s

●

525 Race Stre et, San Jo se, CA 9 5126

●

Revision 051203

te l (40 8) 2 95-98 00

●

www.icst.com

MK3727ALF Related Products

	MK3727ALF	MK3727ATRLF
Description	Clock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8	Clock Generator, 36MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8
Is it lead-free?	Lead free	Lead free
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	SOIC	SOIC
package instruction	0.150 INCH, SOIC-8	0.150 INCH, SOIC-8
Contacts	8	8
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
JESD-30 code	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e3	e3
length	4.9 mm	4.9 mm
Humidity sensitivity level	1	1
Number of terminals	8	8
Maximum operating temperature	70 °C	70 °C
Maximum output clock frequency	36 MHz	36 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260
Master clock/crystal nominal frequency	18 MHz	18 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal surface	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	30	30
width	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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