AD5410ACPZ-REEL7 datasheet, PDF

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AD5410ACPZ-REEL7: DescriptionSERIAL INPUT LOADING, 40 us SETTLING TIME, 12-BIT DAC, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40; CategoryAnalog mixed-signal IC converter; File Size2MB，33 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/; Environmental Compliance

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AD5410ACPZ-REEL7 Overview

SERIAL INPUT LOADING, 40 us SETTLING TIME, 12-BIT DAC, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40

AD5410ACPZ-REEL7 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Rochester Electronics
Parts packaging code	QFN
package instruction	HVQCCN,
Contacts	40
Reach Compliance Code	unknown
Maximum analog output voltage	23.9 V
Minimum analog output voltage
Converter type	D/A CONVERTER
Enter bit code	BINARY
Input format	SERIAL
JESD-30 code	S-XQCC-N40
JESD-609 code	e3
length	6 mm
Maximum linear error (EL)	0.032%
Humidity sensitivity level	1
Number of digits	12
Number of functions	1
Number of terminals	40
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	225
Certification status	COMMERCIAL
Maximum seat height	1 mm
Nominal settling time (tstl)	40 µs
Nominal supply voltage	24 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6 mm

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AD5410/AD5420

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Companion Products ....................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

AC Performance Characteristics ................................................ 5

Timing Characteristics ................................................................ 5

Absolute Maximum Ratings ............................................................ 7

ESD Caution .................................................................................. 7

Pin Configuration and Function Descriptions ............................. 8

Typical Performance Characteristics ........................................... 10

Terminology .................................................................................... 15

Theory of Operation ...................................................................... 16

Architecture ................................................................................. 16

Serial Interface ............................................................................ 16

Power-On State ........................................................................... 19

Transfer Function ....................................................................... 19

Data Register ............................................................................... 19

Control Register .......................................................................... 19

Reset Register .............................................................................. 20

Status Register ............................................................................. 20

Data Sheet

AD5410/AD5420 Features ............................................................ 21

Fault Alert .................................................................................... 21

Asynchronous Clear (CLEAR) ................................................. 21

Internal Reference ...................................................................... 21

External Current Setting Resistor ............................................ 21

Digital Power Supply.................................................................. 21

External Boost Function............................................................ 21

HART Communication ............................................................. 22

Digital Slew Rate Control .......................................................... 22

OUT

Filtering Capacitors ............................................................ 24

Feedback/Monitoring of Output Current ............................... 24

Applications Information .............................................................. 26

Driving Inductive Loads............................................................ 26

Transient Voltage Protection .................................................... 26

Layout Guidelines....................................................................... 26

Galvanically Isolated Interface ................................................. 26

Microprocessor Interfacing ....................................................... 27

Thermal and Supply Considerations ....................................... 27

Industrial, HART Compatible Analog Output Application . 28

Outline Dimensions ....................................................................... 29

Ordering Guide .......................................................................... 29

REVISION HISTORY

3/13—Rev. D to Rev. E

Changes to Table 4 ............................................................................ 7

Added Figure 40, Renumbered Sequentially .............................. 19

Changes to Table 10 ........................................................................ 20

Changes to Thermal and Supply Considerations Section

and Table 21..................................................................................... 27

Updated Outline Dimensions ....................................................... 29

5/12—Rev. C to Rev. D

Reorganized Layout ............................................................ Universal

Changes to Product Title ................................................................. 1

Added Companion Products Section; Changes to Features

Section and Applications Section ................................................... 1

Changes to Table 5 ............................................................................ 9

Change to Figure 8 ......................................................................... 11

Added HART Communication Section and Figure 41,

Renumbered Sequentially.............................................................. 21

Changes to Industrial, HART Compatible Analog Output

Application Section and Figure 54 ............................................... 27

11/11—Rev. B to Rev. C

Rev. E | Page 2 of 32

Changes to Table 10 ....................................................................... 18

2/10—Rev. A to Rev. B

Changes to Figure 46 ..................................................................... 23

8/09—Rev. 0 to Rev. A

Changes to Features and General Description .............................1

Changes to Table 1.............................................................................3

Changes to Table 2.............................................................................5

Changes to Introduction to Table 4 and to Table 4 .......................7

Added Figure 6, Changes to Figure 5 and Table 5 ........................8

Added Feedback/Monitoring of Output Current Section,

Including Figure 45 to Figure 47; Renumbered Subsequent

Figures .............................................................................................. 23

Changes to Thermal and Supply Considerations Section and

Table 21 ............................................................................................ 26

Updated Outline Dimensions ....................................................... 28

Changes to Ordering Guide .......................................................... 28

3/09—Revision 0: Initial Version

AD5410ACPZ-REEL7 Related Products

	AD5410ACPZ-REEL7	AD5410AREZ	AD5420AREZ	AD5420ACPZ-REEL7	AD5410AREZ-REEL7
Description	SERIAL INPUT LOADING, 40 us SETTLING TIME, 12-BIT DAC, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40	SERIAL INPUT LOADING, 40 us SETTLING TIME, 12-BIT DAC, PDSO24, ROHS COMPLIANT, MO-153ADT, TSSOP-24	SERIAL INPUT LOADING, 40us SETTLING TIME, 16-BIT DAC, PDSO24, ROHS COMPLIANT, MO-153ADT, TSSOP-24	SERIAL INPUT LOADING, 40 us SETTLING TIME, 16-BIT DAC, QCC40, 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40	SERIAL INPUT LOADING, 40us SETTLING TIME, 12-BIT DAC, PDSO24, ROHS COMPLIANT, MO-153ADT, TSSOP-24
Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Maker	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics
Parts packaging code	QFN	TSSOP	TSSOP	QFN	TSSOP
package instruction	HVQCCN,	HTSSOP,	HTSSOP,	HVQCCN,	HTSSOP,
Contacts	40	24	24	40	24
Reach Compliance Code	unknown	unknown	unknown	unknown	unknow
Maximum analog output voltage	23.9 V	23.9 V	23.9 V	23.9 V	23.9 V
Converter type	D/A CONVERTER	D/A CONVERTER	D/A CONVERTER	D/A CONVERTER	D/A CONVERTER
Enter bit code	BINARY	BINARY	BINARY	BINARY	BINARY
Input format	SERIAL	SERIAL	SERIAL	SERIAL	SERIAL
JESD-30 code	S-XQCC-N40	R-PDSO-G24	R-PDSO-G24	S-XQCC-N40	R-PDSO-G24
JESD-609 code	e3	e3	e3	e3	e3
length	6 mm	7.8 mm	7.8 mm	6 mm	7.8 mm
Maximum linear error (EL)	0.032%	0.032%	0.024%	0.024%	0.032%
Humidity sensitivity level	1	3	NOT APPLICABLE	NOT APPLICABLE	3
Number of digits	12	12	16	16	12
Number of functions	1	1	1	1	1
Number of terminals	40	24	24	40	24
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	UNSPECIFIED	PLASTIC/EPOXY	PLASTIC/EPOXY	UNSPECIFIED	PLASTIC/EPOXY
encapsulated code	HVQCCN	HTSSOP	HTSSOP	HVQCCN	HTSSOP
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225	260	260	260	260
Certification status	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Maximum seat height	1 mm	1.2 mm	1.2 mm	1 mm	1.2 mm
Nominal settling time (tstl)	40 µs	40 µs	40 µs	40 µs	40 µs
Nominal supply voltage	24 V	15 V	15 V	24 V	15 V
surface mount	YES	YES	YES	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN
Terminal form	NO LEAD	GULL WING	GULL WING	NO LEAD	GULL WING
Terminal pitch	0.5 mm	0.65 mm	0.65 mm	0.5 mm	0.65 mm
Terminal location	QUAD	DUAL	DUAL	QUAD	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	40	40	40	40
width	6 mm	4.4 mm	4.4 mm	6 mm	4.4 mm
Is Samacsys	-	N	N	N	-
Base Number Matches	-	1	1	1	-

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