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Single-Channel, 12-/16-Bit, Serial Input, 4 mA to 20 mA,
Current Source DAC, HART Connectivity
Data Sheet
FEATURES
12-/16-bit resolution and monotonicity
Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or
0 mA to 24 mA
±0.01% FSR typical total unadjusted error (TUE)
±3 ppm/°C typical output drift
Flexible serial digital interface
On-chip output fault detection
On-chip reference (10 ppm/°C maximum)
Feedback/monitoring of output current
Asynchronous clear function
Power supply (AV
DD
) range
10.8 V to 40 V; AD5410AREZ/AD5420AREZ
10.8 V to 60 V; AD5410ACPZ/AD5420ACPZ
Output loop compliance to AV
DD
− 2.5 V
Temperature range: −40°C to +85°C
24-lead TSSOP and 40-lead LFCSP packages
AD5410/AD5420
GENERAL DESCRIPTION
The AD5410/AD5420 are low cost, precision, fully integrated
12-/16-bit converters offering a programmable current source
output designed to meet the requirements of industrial process
control applications. The output current range is programmable
at 4 mA to 20 mA, 0 mA to 20 mA, or an overrange function of
0 mA to 24 mA. The output is open-circuit protected. The
device operates with a power supply (AV
DD
) range from 10.8 V
to 60 V. Output loop compliance is 0 V to AV
DD
− 2.5 V.
The flexible serial interface is SPI, MICROWIRE™, QSPI™, and
DSP compatible and can be operated in 3-wire mode to
minimize the digital isolation required in isolated applications.
The device also includes a power-on reset function, ensuring
that the device powers up in a known state, and an asynchronous
CLEAR pin that sets the output to the low end of the selected
current range.
The total unadjusted error is typically ±0.01% FSR.
APPLICATIONS
Process control
Actuator control
PLC
HART network connectivity
COMPANION PRODUCTS
HART Modem: AD5700, AD5700-1
FUNCTIONAL BLOCK DIAGRAM
DV
CC
SELECT
DV
CC
CAP1
CAP2
AV
DD
AD5410/AD5420
R2
CLEAR
R3
R3
SENSE
BOOST
LATCH
SCLK
SDIN
SDO
INPUT SHIFT
REGISTER
AND CONTROL
LOGIC
12/16
I
OUT
12-/16-BIT
DAC
FAULT
POWER-
ON
RESET
VREF
R
SET
R
SET
REFOUT
REFIN
GND
Figure 1.
Rev. E
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Trademarks and registered trademarks are the property of their respective owners.
07027-001
AD5410/AD5420
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Companion Products ....................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Performance Characteristics ................................................ 5
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 15
Theory of Operation ...................................................................... 16
Architecture ................................................................................. 16
Serial Interface ............................................................................ 16
Power-On State ........................................................................... 19
Transfer Function ....................................................................... 19
Data Register ............................................................................... 19
Control Register .......................................................................... 19
Reset Register .............................................................................. 20
Status Register ............................................................................. 20
Data Sheet
AD5410/AD5420 Features ............................................................ 21
Fault Alert .................................................................................... 21
Asynchronous Clear (CLEAR) ................................................. 21
Internal Reference ...................................................................... 21
External Current Setting Resistor ............................................ 21
Digital Power Supply.................................................................. 21
External Boost Function............................................................ 21
HART Communication ............................................................. 22
Digital Slew Rate Control .......................................................... 22
I
OUT
Filtering Capacitors ............................................................ 24
Feedback/Monitoring of Output Current ............................... 24
Applications Information .............................................................. 26
Driving Inductive Loads............................................................ 26
Transient Voltage Protection .................................................... 26
Layout Guidelines....................................................................... 26
Galvanically Isolated Interface ................................................. 26
Microprocessor Interfacing ....................................................... 27
Thermal and Supply Considerations ....................................... 27
Industrial, HART Compatible Analog Output Application . 28
Outline Dimensions ....................................................................... 29
Ordering Guide .......................................................................... 29
REVISION HISTORY
3/13—Rev. D to Rev. E
Changes to Table 4 ............................................................................ 7
Added Figure 40, Renumbered Sequentially .............................. 19
Changes to Table 10 ........................................................................ 20
Changes to Thermal and Supply Considerations Section
and Table 21..................................................................................... 27
Updated Outline Dimensions ....................................................... 29
5/12—Rev. C to Rev. D
Reorganized Layout ............................................................ Universal
Changes to Product Title ................................................................. 1
Added Companion Products Section; Changes to Features
Section and Applications Section ................................................... 1
Changes to Table 5 ............................................................................ 9
Change to Figure 8 ......................................................................... 11
Added HART Communication Section and Figure 41,
Renumbered Sequentially.............................................................. 21
Changes to Industrial, HART Compatible Analog Output
Application Section and Figure 54 ............................................... 27
11/11—Rev. B to Rev. C
Rev. E | Page 2 of 32
Changes to Table 10 ....................................................................... 18
2/10—Rev. A to Rev. B
Changes to Figure 46 ..................................................................... 23
8/09—Rev. 0 to Rev. A
Changes to Features and General Description .............................1
Changes to Table 1.............................................................................3
Changes to Table 2.............................................................................5
Changes to Introduction to Table 4 and to Table 4 .......................7
Added Figure 6, Changes to Figure 5 and Table 5 ........................8
Added Feedback/Monitoring of Output Current Section,
Including Figure 45 to Figure 47; Renumbered Subsequent
Figures .............................................................................................. 23
Changes to Thermal and Supply Considerations Section and
Table 21 ............................................................................................ 26
Updated Outline Dimensions ....................................................... 28
Changes to Ordering Guide .......................................................... 28
3/09—Revision 0: Initial Version
Data Sheet
SPECIFICATIONS
AD5410/AD5420
AV
DD
= 10.8 V to 26.4 V, GND = 0 V, REFIN = 5 V external; DV
CC
= 2.7 V to 5.5 V, R
LOAD
= 300 Ω; all specifications T
MIN
to T
MAX
,
unless otherwise noted.
Table 1.
Parameter
1
OUTPUT CURRENT RANGES
Min
0
0
4
16
12
−0.3
−0.13
−0.5
−0.3
−0.024
−0.032
−1
−0.27
−0.12
3
Typ
Max
24
20
20
Unit
mA
mA
mA
Bits
Bits
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
LSB
% FSR
% FSR
ppm FSR/°C
% FSR
% FSR
Test Conditions/Comments
ACCURACY, INTERNAL R
SET
Resolution
Total Unadjusted Error (TUE)
±0.08
±0.15
Relative Accuracy (INL)
2
Differential Nonlinearity (DNL)
Offset Error
Offset Error Temperature Coefficient (TC)
Gain Error
±0.08
±16
±0.006
±0.012
±10
±0.08
±12
+0.3
+0.13
+0.5
+0.3
+0.024
+0.032
+1
+0.27
+0.12
+0.18
+0.03
+0.22
+0.06
+0.2
+0.1
AD5420
AD5410
AD5420
AD5420, T
A
= 25°C
AD5410
AD5410, T
A
= 25°C
AD5420
AD5410
Guaranteed monotonic
T
A
= 25°C
AD5420
AD5420, T
A
= 25°C
AD5410
AD5410, T
A
= 25°C
−0.18
−0.03
−0.22
−0.06
−0.2
−0.1
3
Gain Error Temperature Coefficient (TC)
Full-Scale Error
3
Full-Scale Error Temperature Coefficient (TC)
ACCURACY, EXTERNAL R
SET
Resolution
Total Unadjusted Error (TUE)
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
Bits
Bits
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
LSB
% FSR
% FSR
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
V
ppm FSR
ppm FSR
Ω
mH
µA/V
T
A
= 25°C
Assumes an ideal 15 kΩ resistor
AD5420
AD5410
AD5420
AD5420, T
A
= 25°C
AD5410
AD5410, T
A
= 25°C
AD5420
AD5410
Guaranteed monotonic
T
A
= 25°C
Relative Accuracy (INL)
2
Differential Nonlinearity (DNL)
Offset Error
Offset Error Temperature Coefficient (TC)
Gain Error
Gain Error Temperature Coefficient (TC)
Full-Scale Error
3
3
16
12
−0.15
−0.06
−0.3
−0.1
−0.012
−0.032
−1
−0.1
−0.03
−0.08
−0.05
−0.15
−0.06
3
±0.01
±0.02
±0.006
±3
±0.003
±4
±0.01
±7
+0.15
+0.06
+0.3
+0.1
+0.012
+0.032
+1
+0.1
+0.03
+0.08
+0.05
+0.15
+0.06
T
A
= 25°C
T
A
= 25°C
Full-Scale Error Temperature Coefficient (TC)
OUTPUT CHARACTERISTICS
3
Current Loop Compliance Voltage
Output Current Drift vs. Time
Resistive Load
Inductive Load
DC Power Supply Rejection Ratio (PSRR)
0
50
20
AV
DD
− 2.5
Internal R
SET
, drift after 1000 hours at 125°C
External R
SET
, drift after 1000 hours at 125°C
T
A
= 25°C
1200
50
1
Rev. E | Page 3 of 32
AD5410/AD5420
Parameter
1
Output Impedance
Output Current Leakage
R3 Resistor Value
R3 Resistor Temperature Coefficient (TC)
I
BIAS
Current
I
BIAS
Current Temperature Coefficient (TC)
REFERENCE INPUT/OUTPUT
Reference Input
3
Reference Input Voltage
DC Input Impedance
Reference Output
Output Voltage
Reference TC
3
, 4
Output Noise (0.1 Hz to 10 Hz)
3
Noise Spectral Density
3
Output Voltage Drift vs. Time
3
Capacitive Load
3
Load Current
3
Short-Circuit Current
3
Load Regulation
3
DIGITAL INPUTS
3
Input High Voltage, V
IH
Input Low Voltage, V
IL
Input Current
Pin Capacitance
DIGITAL OUTPUTS
3
SDO
Output Low Voltage, V
OL
Output High Voltage, V
OH
High Impedance Leakage Current
High Impedance Output Capacitance
FAULT
Output Low Voltage, V
OL
Output Low Voltage, V
OL
Output High Voltage, V
OH
POWER REQUIREMENTS
AV
DD
DV
CC
Input Voltage
Output Voltage
Output Load Current
3
Short-Circuit Current
3
AI
DD
DI
CC
Power Dissipation
Min
Typ
50
60
40
30
444
30
Max
Unit
MΩ
pA
Ω
ppm/°C
µA
ppm/°C
Output disabled
T
A
= 25°C
Data Sheet
Test Conditions/Comments
36
399
44
489
4.95
25
4.995
5
30
5.000
1.8
18
100
50
600
5
7
95
5.05
V
kΩ
V
ppm/°C
µV p-p
nV/√Hz
ppm
nF
mA
mA
ppm/mA
V
V
µA
pF
For specified performance
5.005
10
T
A
= 25°C
@ 10 kHz
Drift after 1000 hours, T
A
= 125°C
JEDEC compliant
2
−1
10
0.8
+1
Per pin
Per pin
0.4
DV
CC
− 0.5
−1
5
0.4
0.6
3.6
10.8
10.8
2.7
4.5
5
20
3
4
1
144
50
40
60
5.5
+1
V
V
µA
pF
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mW
mW
Sinking 200 µA
Sourcing 200 µA
10 kΩ pull-up resistor to DV
CC
2.5 mA load current
10 kΩ pull-up resistor to DV
CC
TSSOP package
LFCSP package
Internal supply disabled
DV
CC
can be overdriven up to 5.5 V
Output disabled
Output enabled
V
IH
= DV
CC
, V
IL
= GND
AV
DD
= 40 V, I
OUT
= 0 mA
AV
DD
= 15 V, I
OUT
= 0 mA
Temperature range: −40°C to +85°C; typical at +25°C.
For 0 mA to 20 mA and 0 mA to 24 mA ranges, INL is measured from Code 256 for the AD5420 and Code 16 for the AD5410.
3
Guaranteed by design and characterization but not production tested.
4
The on-chip reference is production trimmed and tested at 25°C and 85°C. It is characterized from −40°C to +85°C.
1
2
Rev. E | Page 4 of 32
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