Data Sheet
FEATURES
Voltage-controlled amplifier/attenuator
Operating frequency: 1 MHz to 1.2 GHz
Optimized for controlling output power
High linearity: OIP3 47 dBm @ 100 MHz
Output noise floor: −149 dBm/Hz @ maximum gain
Input impedance: 50 Ω
Output impedance: 20 Ω
Wide gain-control range: 30 dB
Linear-in-dB gain control function: 40 mV/dB
Single-supply voltage: 4.75 V to 5.25 V
1 MHz to 1.2 GHz VGA with
30 dB Gain Control Range
ADL5331
FUNCTIONAL BLOCK DIAGRAM
GAIN
VPS1
GAIN
CONTROL
CONTINUOUSLY
VARIABLE
ATTENUATOR
ENBL
VPS2
VPS2
VPS2
VPS2
VPS2
ADL5331
COM2
COM1
INHI
RFIN
INLO
COM1
INPUT
GM
STAGE
OUTPUT OPHI
(TZ)
STAGE
OPLO
COM2
RFOUT
BIAS
AND
VREF
Transmit and receive power control at RF and IF
CATV distribution
NC
IPBS
OPBS COM2 COM2 COM2
Figure 1.
GENERAL DESCRIPTION
The ADL5331 is a high performance, voltage-controlled
variable gain amplifier/attenuator for use in applications with
frequencies up to 1.2 GHz. The balanced structure of the signal
path maximizes signal swing, eliminates common-mode noise
and minimizes distortion while it also reduces the risk of spu-
rious feed-forward at low gains and high frequencies caused by
parasitic coupling.
The 50 Ω differential input system converts the applied
differential voltage at INHI and INLO to a pair of differential
currents with high linearity and good common-mode rejection.
The signal currents are then applied to a proprietary voltage-
controlled attenuator providing precise definition of the overall
gain under the control of the linear-in-dB interface. The GAIN
pin accepts a voltage from 0 V at a minimum gain to 1.4 V at a
full gain with a 40 mV/dB scaling factor over most of the range.
The output of the high accuracy wideband attenuator is applied
to a differential transimpedance output stage. The output stage
provides a differential output at OPHI and OPLO, which must be
pulled up to the supply with RF chokes or a center-tapped balun.
The ADL5331 consumes 240 mA of current including the out-
put pins and operates off a single supply ranging from 4.75 V
to 5.25 V. A power-down function is provided by applying a
logic low input on the ENBL pin. The current consumption in
power-down mode is 250 μA.
The ADL5331 is fabricated on an Analog Devices, Inc., pro-
prietary high performance, complementary bipolar IC process.
The ADL5331 is available in a 24-lead (4 mm × 4 mm), Pb-free
LFCSP package and is specified for operation from ambient
temperatures of −40°C to +85°C. An evaluation board is also
available.
Rev. A
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07593-001
APPLICATIONS
VPS1
VPS2
ADL5331* PRODUCT PAGE QUICK LINKS
Last Content Update: 10/18/2017
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•
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•
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•
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DOCUMENTATION
Data Sheet
•
ADL5331: 1 MHz to 1.2 GHz VGA with 30 dB Gain Control
Range Data Sheet
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ADL5331
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Data Sheet
Theory of Operation .........................................................................8
Applications Information .................................................................9
Basic Connections .........................................................................9
Gain Control Input..................................................................... 10
CMTS Transmit Application .................................................... 12
Interfacing to an IQ Modulator ................................................ 13
Soldering Information ............................................................... 13
Evaluation Board Schematic ......................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
REVISION HISTORY
10/2017—Rev. 0 to Rev. A
Changed CP-24-2 to CP-24-14 .................................... Throughout
Change to General Description ...................................................... 1
Change to Figure 2 and Table 3 ...................................................... 5
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 15
5/2009—Revision 0: Initial Version
Rev. A | Page 2 of 15
Data Sheet
SPECIFICATIONS
V
S
= 5 V; T
A
= 25°C; M/A-COM ETC1-1-13 1:1 balun at input and output for single-ended 50 Ω match.
Table 1.
Parameter
GENERAL
Usable Frequency Range
Nominal Input Impedance
Nominal Output Impedance
FREQUENCY INPUT = 100 MHz
Gain Control Span
Minimum Gain
Maximum Gain
Gain Flatness vs. Frequency
Gain Control Slope
Gain Control Intercept
Output IP3
Output Noise Floor
Noise Figure
FREQUENCY INPUT = 400 MHz
Gain Control Span
Minimum Gain
Maximum Gain
Gain Flatness vs. Frequency
Gain Control Slope
Gain Control Intercept
Output IP3
Output Noise Floor
Noise Figure
FREQUENCY INPUT = 900 MHz
Gain Control Span
Minimum Gain
Maximum Gain
Gain Flatness vs. Frequency
Gain Control Slope
Gain Control Intercept
Third-Order Harmonic
Output IP3
Output Noise Floor
Noise Figure
GAIN CONTROL INPUT
Gain Control Voltage Range
1
Incremental Input Resistance
Response Time
POWER SUPPLIES
Voltage
Current, Nominal Active
ENBL, Logic 1, Device Enabled
ENBL, Logic 0, Device Disabled
Current, Disabled
1
ADL5331
Conditions
Min
0.001
Typ
Max
1.2
Unit
GHz
Ω
Ω
dB
dB
dB
dB
mV/dB
mV
dBm
dBm/Hz
dB
dB
dB
dB
dB
mV/dB
mV
dBm
dBm/Hz
dB
dB
dB
dB
dB
mV/dB
mV
dBc
dBm
dBm/Hz
dB
50
20
±3 dB gain law conformance
V
GAIN
= 0.1 V
V
GAIN
= 1.4 V
±30 MHz around center frequency, V
GAIN
= 1.0 V (differential output)
Gain = 0 dB, gain = slope (V
GAIN
− intercept)
V
GAIN
= 1.4 V, input −13 dBm per tone, two tone measurement
V
GAIN
= 1.4 V
V
GAIN
= 1.4 V
±3 dB gain law conformance
V
GAIN
= 0.1 V
V
GAIN
= 1.4 V
±30 MHz around center frequency, V
GAIN
= 1.0 V (differential output)
Gain = 0 dB, gain = slope (V
GAIN
− intercept)
V
GAIN
= 1.4 V, input −13 dBm per tone, two tone measurement
20 MHz carrier offset, V
GAIN
= 1.4 V
V
GAIN
= 1.4 V
±3 dB gain law conformance
V
GAIN
= 0.1 V
V
GAIN
= 1.4 V
±30 MHz around center frequency, V
GAIN
= 1.0 V (differential output)
Gain = 0 dB, gain = slope (V
GAIN
− intercept)
−8 dBm output at 900 MHz fundamental
V
GAIN
= 1.4 V, input −13 dBm per tone, two tone measurement
20 MHz carrier offset, V
GAIN
= 1.4 V
V
GAIN
= 1.4 V
Pin GAIN
0.1
Pin GAIN to Pin COM1
Full scale, to within 1 dB of final gain
3 dB gain step, P
OUT
to within 1 dB of final gain
Pin VPS1, Pin VPS2, Pin COM1, Pin COM2, Pin ENBL
4.75
2.3
0.8
ENBL = Logic 0
250
1
380
20
5
240
5.25
30
−14
17
0.09
40
700
47
−149
9
30
−15
15
0.09
39.5
730
39
−150
9
35
−18
15
0.09
37
800
−75
32
−150
9
1.4
V
MΩ
ns
ns
V
mA
V
V
µA
Minimum gain voltage varies with frequency (see Figure 3, Figure 4, and Figure 5).
Rev. A | Page 3 of 15
ADL5331
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VPS1
Supply Voltage VPS2
VPS2 to VPS1
RF Input Power
OPHI, OPLO
ENBL
GAIN
Internal Power Dissipation
θ
JA
(with Pad Soldered to Board)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
5.5 V
5.5 V
±200 mV
5 dBm at 50 Ω
5.5 V
VPS1
VPS1
1.2 W
56.1°C/W
150°C
−40°C to +85°C
−65°C to +150°C
Data Sheet
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. A | Page 4 of 15
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