8305AGT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> logic> 8305AGT

8305AGT: Description8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16; Categorysemiconductor logic; File Size415KB，17 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

Download Datasheet Parametric Compare View All

8305AGT Overview

8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16

8305AGT Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	16
Maximum operating temperature	70 Cel
Minimum operating temperature	0.0 Cel
Maximum supply/operating voltage	3.46 V
Minimum supply/operating voltage	3.14 V
Rated supply voltage	3.3 V
Processing package description	4.40 × 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
packaging shape	Rectangle
Package Size	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.6500 mm
terminal coating	MATTE Tin
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	COMMERCIAL
series	8305
Enter conditions	Differential MUX
Logic IC type	Low Skew Clock Driver
Number of inverted outputs	0.0
Real output number	4
propagation delay TPD	4 ns
Maximum same-side bending	0.0350 ns
Max-Min frequency	350 MHz

Preview

Download Datasheet

View All

Low Skew, 1-to-4 Multiplexed Differential/

LVCMOS-to-LVCMOS/LVTTL Fanout Buffer

ICS8305

DATA SHEET

General Description

The ICS8305 is a low skew, 1-to-4, Differential/ LVCMOS-to-

LVCMOS/LVTTL Fanout Buffer. The ICS8305 has selectable clock

inputs that accept either differential or single ended input levels. The

clock enable is internally synchronized to eliminate runt pulses on

the outputs during asynchronous assertion/deassertion of the clock

enable pin. Outputs are forced LOW when the clock is disabled. A

separate output enable pin controls whether the outputs are in the

active or high impedance state.

Guaranteed output and part-to-part skew characteristics make the

ICS8305 ideal for those applications demanding well defined

performance and repeatability.

Features

•

Four LVCMOS / LVTTL outputs, 7



output impedance

Selectable differential or LVCMOS / LVTTL clock inputs

CLK, nCLK pair can accept the following differential input levels:

LVPECL, LVDS, LVHSTL, HCSL, SSTL

LVCMOS_CLK supports the following input types: LVCMOS,

LVTTL

Maximum output frequency: 350MHz

Output skew: 35ps (maximum)

Part-to-part skew: 700ps (maximum)

Additive phase jitter, RMS: 0.04ps (typical)

Power supply modes:

Core/Output

3.3V/3.3V

3.3V/2.5V

3.3V/1.8V

3.3V/1.5V

0°C to 70°C ambient operating temperature

Available in lead-free (RoHS 6) package

•

Block Diagram

CLK_EN

Pullup

LVCMOS_CLK

Pulldown

CLK

Pulldown

nCLK

Pullup/

Pulldown

Pin Assignment

GND

CLK_EN

CLK

nCLK

CLK_SEL

LVCMOS_CLK

DDO

GND

DDO

GND

CLK_SEL

Pullup

ICS8305

16-Lead TSSOP

4.4mm x 3.0mm x 0.925mm package body

G Package

Top View

Pullup

ICS8305AG REVISION C MAY 30, 2014

8305AGT Related Products

	8305AGT	8305AG	8305AGLFT	ICS8305
Description	8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16	8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16	8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16	8305 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
Number of functions	1	1	1	1
Number of terminals	16	16	16	16
Maximum operating temperature	70 Cel	70 Cel	70 Cel	70 Cel
Minimum operating temperature	0.0 Cel	0.0 Cel	0.0 Cel	0.0 Cel
Maximum supply/operating voltage	3.46 V	3.46 V	3.46 V	3.46 V
Minimum supply/operating voltage	3.14 V	3.14 V	3.14 V	3.14 V
Rated supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
Processing package description	4.40 × 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16	4.40 × 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16	4.40 × 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16	4.40 × 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-16
Lead-free	Yes	Yes	Yes	Yes
EU RoHS regulations	Yes	Yes	Yes	Yes
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE
packaging shape	Rectangle	Rectangle	Rectangle	Rectangle
Package Size	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mount	Yes	Yes	Yes	Yes
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal spacing	0.6500 mm	0.6500 mm	0.6500 mm	0.6500 mm
terminal coating	MATTE Tin	MATTE Tin	MATTE Tin	MATTE Tin
Terminal location	pair	pair	pair	pair
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
series	8305	8305	8305	8305
Enter conditions	Differential MUX	Differential MUX	Differential MUX	Differential MUX
Logic IC type	Low Skew Clock Driver	Low Skew Clock Driver	Low Skew Clock Driver	Low Skew Clock Driver
Number of inverted outputs	0.0	0.0	0.0	0.0
Real output number	4	4	4	4
propagation delay TPD	4 ns	4 ns	4 ns	4 ns
Maximum same-side bending	0.0350 ns	0.0350 ns	0.0350 ns	0.0350 ns
Max-Min frequency	350 MHz	350 MHz	350 MHz	350 MHz

Recommended Resources

Philips 170B LCD monitor inverter circuit

power circuit.gif

Double arm rectifier module series circuit

Charger circuit diagram using TL494

Gaussmeter circuit

square root circuit

32-bit unsigned divider: Although there are division instructions in the Verilog HDL language, the divisor in the division operator must be a power of 2, so it is impossible to implement division with a divisor of any integer...; eeleader FPGA/CPLD

How to set the pad through-hole type in protel?: How to set the pad through-hole type in protel? How to change the round through-hole to a rectangular one?...; pwf625 PCB Design

How to assign values to multiple IO ports at the same time?: I would like to ask, for different IOs, such as GPIOA1, A2, A3, B1, B2, B3, C1, C2, can I use a structure to write these eight non-continuous IO ports into a group, and then assign values to this grou...; 玻璃之城2046 stm32/stm8

EEWORLD University ---- Miz702 zynq video beginner tutorial (Milinke): Miz702 zynq video beginner tutorial (Milink) : https://training.eeworld.com.cn/course/5654Miz702 video for fresh man, about development environment, ZYNQ GPIO, ADC, DDR, AXI and other contents...; 木犯001号 FPGA/CPLD

raw-os 2.005 released: Raw-OS 2.005 is available for download at: http://www.raw-os.org/download.html. For new features, please refer to: Raw-OS 2.005 VS 2015 platform port...; jorya_txj Embedded System

msp430f5529 interrupt notes: Defining an interrupt service routine #pragma vector=PORT1_VECTOR //P1 port interrupt vector__interruptvoid Port_1(void) //Declare interrupt service routine, named Port_1{... //Interrupt service routi...; Aguilera Microcontroller MCU

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components