Preliminary Data Sheet No. PD60030 rev.P
IR2213(S) & (PbF)
HIGH AND LOW SIDE DRIVER
Features
•
Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
Fully operational to +1200V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 12 to 20V
Undervoltage lockout for both channels
3.3V logic compatible
Separate logic supply range from 3.3V to 20V
Logic and power ground ±5V offset
CMOS Schmitt-triggered inputs with pull-down
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Outputs in phase with inputs
Also available LEAD-FREE (PbF)
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Delay Matching
1200V max.
1.7A / 2A
12 - 20V
280 & 225 ns
30 ns
Packages
Description
The IR2213(S) is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary
16-Lead SOIC
HVIC and latch immune CMOS technologies enable
(wide body)
ruggedized monolithic construction. Logic inputs are
14-Lead PDIP
compatible with standard CMOS or LSTTL outputs,
down to 3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched
to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which operates up to 1200 volts.
Typical Connection
HO
V
DD
HIN
SD
LIN
V
SS
V
CC
V
DD
HIN
SD
LIN
V
SS
V
CC
COM
LO
V
B
V
S
up to 1200V
TO
LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IR2213(
S
) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
dVs/dt
P
D
R
THJA
T
J
T
S
T
L
Definition
High Side Floating Supply Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Figure 2)
Package Power Dissipation @ T
A
≤
+25°C
Thermal Resistance, Junction to Ambient
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
(14 Lead PDIP)
(16 Lead SOIC)
(14 Lead PDIP)
(16 Lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
-0.3
V
CC
- 25
V
SS
- 0.3
—
—
—
—
—
—
-55
—
Max.
1225
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
SS
+ 25
V
CC
+ 0.3
V
DD
+ 0.3
50
1.6
1.25
75
100
125
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
Definition
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Supply Voltage
Logic Supply Offset Voltage
Logic Input Voltage (HIN, LIN & SD)
Min.
V
S
+ 12
Note 1
V
S
12
0
V
SS
+ 3
-5 (Note 2)
V
SS
Max.
V
S
+ 20
1200
V
B
20
V
CC
V
SS
+ 20
5
V
DD
Units
V
Note 1: Logic operational for V
S
of -5 to +1200V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When V
DD
<5V, the minimum V
SS
offset is limited to -V
DD
2
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IR2213(
S
) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
, V
DD
) = 15V, C
L
= 1000 pF, T
A
= 25°C and V
SS
= COM unless otherwise specified. The dynamic
electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
t
on
t
off
t
sd
t
r
t
f
MT
Definition
Turn-On Propagation Delay
Turn-Off Propagation Delay
Shutdown Propagation Delay
Turn-On Rise Time
Turn-Off Fall Time
Delay Matching, HS & LS Turn-On/Off
Min. Typ. Max. Units Test Conditions
—
—
—
—
—
—
280
225
230
25
17
—
—
—
—
—
—
30
V
S
= 0V
V
S
= 1200V
V
S
= 1200V
ns
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
, V
DD
) = 15V, T
A
= 25°C and V
SS
= COM unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters
are referenced to V
SS
and are applicable to all three logic input leads: HIN, LIN and SD. The V
O
and I
O
parameters are
referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
QDD
I
IN+
I
IN-
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
I
O+
I
O-
Definition
Logic “1” Input Voltage
Logic “0” Input Voltage
High Level Output Voltage, V
BIAS
- V
O
Low Level Output Voltage, V
O
Offset Supply Leakage Current
Quiescent V
BS
Supply Current
Quiescent V
CC
Supply Current
Quiescent V
DD
Supply Current
Logic “1” Input Bias Current
Logic “0” Input Bias Current
V
BS
Supply Undervoltage Positive Going
Threshold
V
BS
Supply Undervoltage Negative Going
Threshold
V
CC
Supply Undervoltage Positive Going
Threshold
V
CC
Supply Undervoltage Negative Going
Threshold
Output High Short Circuit Pulsed Current
Output Low Short Circuit Pulsed Current
Min. Typ. Max. Units Test Conditions
9.5
—
—
—
—
—
—
—
—
—
8.7
7.9
8.7
7.9
1.7
2.0
—
—
—
—
—
125
180
15
20
—
10.2
9.3
10.2
9.3
2.0`
2.5
—
6.0
1.2
0.1
50
230
340
30
40
1.0
11.7
10.7
11.7
10.7
—
—
A
V
O
= 0V, V
IN
= V
DD
PW
≤
10
µs
V
O
= 15V, V
IN
= 0V
PW
≤
10
µs
V
µA
V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 1200V
V
IN
= 0V or V
DD
V
IN
= 0V or V
DD
V
IN
= 0V or V
DD
V
IN
= V
DD
V
IN
= 0V
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3
IR2213(
S
) & (PbF)
Functional Block Diagram
V
B
V
DD
R Q
S
HIN
HV
LEVEL
SHIFT
UV
DETECT
PULSE
FILTER
R
R
S
Q
HO
V
DD
/V
CC
LEVEL
SHIFT
PULSE
GEN
V
S
SD
UV
DETECT
V
CC
V
DD
/V
CC
LEVEL
SHIFT
LIN
R Q
V
SS
S
LO
DELAY
COM
Lead Definitions
Symbol Description
V
DD
HIN
SD
LIN
V
SS
V
B
HO
V
S
V
CC
LO
COM
Logic supply
Logic input for high side gate driver output (HO), in phase
Logic input for shutdown
Logic input for low side gate driver output (LO), in phase
Logic ground
High side floating supply
High side gate drive output
High side floating supply return
Low side supply
Low side gate drive output
Low side return
Lead Assignments
14 Lead PDIP
16 Lead SOIC (Wide Body)
IR2213
Part Number
4
IR2213S
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IR2213(
S
) & (PbF)
HV =10 to 1200V
<50 V/ns
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
HIN
LIN
(0 to 1200V)
50%
50%
ton
tr
90%
toff
90%
tf
HO
LO
Figure 3. Switching Time Test Circuit
10%
10%
Figure 4. Switching Time Waveform Definition
50%
HIN
LIN
50%
50%
SD
tsd
90%
MT
LO
HO
10%
MT
90%
HO
LO
LO
Figure 5. Shutdown Waveform Definitions
HO
Figure 6. Delay Matching Waveform Definitions
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