Field Programmable Gate Array, 100 CLBs, 3000 Gates, 120MHz, CMOS, PQCC68
| Parameter Name | Attribute value |
| Maker | LSC/CSI |
| package instruction | , |
| Reach Compliance Code | unknown |
| Other features | 360 FLIP-FLOPS |
| maximum clock frequency | 120 MHz |
| Combined latency of CLB-Max | 7 ns |
| JESD-30 code | S-PQCC-J68 |
| Configurable number of logic blocks | 100 |
| Equivalent number of gates | 3000 |
| Number of terminals | 68 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 100 CLBS, 3000 GATES |
| Package body material | PLASTIC/EPOXY |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified |
| Maximum supply voltage | 5.25 V |
| Minimum supply voltage | 4.75 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal form | J BEND |
| Terminal location | QUAD |
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