EEWORLDEEWORLDEEWORLD

Part Number

Search

51762-30714000CB

Description
Board Connector, 147 Contact(s), 4 Row(s), Female, Right Angle, Press Fit Terminal, Receptacle
CategoryThe connector    The connector   
File Size278KB,3 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Download Datasheet Parametric View All

51762-30714000CB Overview

Board Connector, 147 Contact(s), 4 Row(s), Female, Right Angle, Press Fit Terminal, Receptacle

51762-30714000CB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAmphenol
Reach Compliance Codecompliant
Other featuresTERMINAL PITCH FOR POWER CONTACTS: 6.35 MM
Body/casing typeRECEPTACLE
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (30) OVER NICKEL (50)
Contact completed and terminatedGold (Au) - with Nickel (Ni) barrier
Contact point genderFEMALE
Contact materialCOPPER ALLOY
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Mixed contactsYES
Installation methodRIGHT ANGLE
Installation typeBOARD
Number of rows loaded4
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typePRESS FIT
Total number of contacts147
UL Flammability Code94V-0
PDM: Rev:J
STATUS:
Released
Printed: Nov 02, 2006
.
ESD Classic Answers
Share a classic ESD solution and learn together! @...
huneybin Power technology
An error occurred when the program was generated. I don’t know why?
The compilation is correct, I don't know why the file cannot be generated...
Ivanka 51mcu
About program optimization issues
When programming with Keil or IAR, I find it difficult to use its optimization function. Once it is used, the program cannot run normally, especially the high-level optimization. I think I should make...
dlyltm Microcontroller MCU
Triangle wave comparison method PWM tracking algorithm
I am learning PWM current tracking recently. There is a triangle wave comparison method PWM tracking algorithm commonly used in APF. My program idea is to set the 2812 counter to increase or decrease ...
xzyxtt DSP and ARM Processors
IP core interconnection strategy and specifications
With the development of ultra-deep submicron technology, IC design capabilities and process capabilities have been greatly improved. The use of SoC (System on Chip) to integrate microprocessors, IP co...
eeleader FPGA/CPLD
Study on the influence of chip power pin decoupling capacitor and via position
318863 1. Topic: When designing PCB, the power pin of the chip usually needs to add 0.1uF decoupling capacitor. The decoupling capacitor is placed near the pin, and a via is made near the power layer ...
zhengzhiyi312 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2301  1108  284  1242  1861  47  23  6  26  38 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号