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PIC32MX250F128B

Description
32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog
File Size3MB,328 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Download user manual View All

PIC32MX250F128B Overview

32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PIC32MX1XX/2XX
32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with
Audio and Graphics Interfaces, USB, and Advanced Analog
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz
• 2.3V to 3.6V, -40ºC to +85ºC, DC to 50 MHz
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Core: 50 MHz/83 DMIPS MIPS32
®
M4K
®
• MIPS16e
®
mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Two UART modules (12.5 Mbps)
- Supports LIN 2.0 protocols and IrDA
®
support
• Two 4-wire SPI modules (25 Mbps)
• Two I
2
C modules (up to 1 Mbaud) with SMBus support
• Peripheral Pin Select (PPS) to allow function remap
• Parallel Master Port (PMP)
Power Management
Low-power management modes (Sleep, Idle)
Integrated Power-on Reset and Brown-out Reset
0.5 mA/MHz dynamic current (typical)
20
μA
I
PD
current (typical)
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• Two additional channels dedicated for USB
• Programmable Cyclic Redundancy Check (CRC)
Audio Interface Features
• Data communication: I
2
S, LJ, RJ, DSP modes
• Control interface: SPI and I
2
C™
• Master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
Input/Output
• 10 mA source/sink on all I/O pins and up to 14 mA on
non-standard V
OH
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Advanced Analog Features
• ADC Module:
- 10-bit 1.1 Msps rate with one S&H
- Up to 10 analog inputs on 28-pin devices and 13
analog inputs on 44-pin devices
• Flexible and independent ADC trigger sources
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement capability
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited program and six complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type
Pin Count
I/O Pins (up to)
Contact/Lead Pitch
Dimensions
Note:
SOIC
28
21
1.27
17.90x7.50x2.65
SSOP
28
21
0.65
10.2x5.3x2
SPDIP
28
21
0.100''
1.365''x.285''x.135''
28
21
0.65
6x6x0.9
QFN
44
34
0.65
8x8x0.9
36
25
0.50
5x5x0.9
VTLA
44
34
0.50
6x6x0.9
TQFP
44
34
0.80
10x10x1
All dimensions are in millimeters (mm) unless specified.
2011-2012 Microchip Technology Inc.
Preliminary
DS61168E-page 1
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