DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD442012A-X
2M-BIT CMOS STATIC RAM
128K-WORD BY 16-BIT
EXTENDED TEMPERATURE OPERATION
Description
The
μ
PD442012A-X is a high speed, low power, 2,097,152 bits (131,072 words by 16 bits) CMOS static RAM.
The
μ
PD442012A-X has two chip enable pins (/CE1, CE2) to extend the capacity.
The
μ
PD442012A-X is packed in 48-pin PLASTIC TSOP (I) (Normal bent).
Features
•
131,072 words by 16 bits organization
•
Fast access time : 50, 55, 70, 85, 100, 120 ns (MAX.)
•
Byte data control : /LB (I/O1 - I/O8), /UB (I/O9 - I/O16)
•
Low voltage operation
(BB version : V
CC
= 2.7 to 3.6 V, BC version : V
CC
= 2.2 to 3.6 V, DD version : V
CC
= 1.8 to 2.2 V)
•
Low V
CC
data retention : 1.0 V (MIN.)
•
Operating ambient temperature : T
A
= –25 to +85 °C
•
Output Enable input for easy application
•
Two Chip Enable inputs : /CE1, CE2
Part number
Access time
ns (MAX.)
Operating supply Operating ambient
voltage
V
temperature
°C
−25
to +85
At operating
mA (MAX.)
30
35
40
Note 2
Note 3
Note 4
Supply current
At standby
At data retention
μ
A (MAX.)
4
μ
A (MAX.)
2
μ
PD442012A-BBxxX
50
Note 1
, 55, 70, 85
2.7 to 3.6
μ
PD442012A-BCxxX
μ
PD442012A-DDxxX
70, 85, 100
85, 100, 120
2.2 to 3.6
1.8 to 2.2
30
15
3
Notes 1.
V
CC
≥
3.0 V
2.
Cycle time
≥
70 ns
3.
Cycle time = 55 ns
4.
Cycle time = 50 ns
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M14671EJ9V0DS00 (9th edition)
Date Published September 2006 NS CP (K)
Printed in Japan
The mark <R> shows major revised points.
2000
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PD442012A-X
Pin Configuration (Marking Side)
/xxx indicates active low signal.
48-pin PLASTIC TSOP (I) (12×18) (Normal bent)
[
μ
PD442012AGY-BBxxX-MJH ]
[
μ
PD442012AGY-BCxxX-MJH ]
[
μ
PD442012AGY-DDxxX-MJH ]
[
μ
PD442012AGY-BBxxX-MJH-A ]
[
μ
PD442012AGY-BCxxX-MJH-A ]
[
μ
PD442012AGY-DDxxX-MJH-A ]
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
/WE
CE2
IC
/UB
/LB
NC
NC
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
NC
GND
I/O16
I/O8
I/O15
I/O7
I/O14
I/O6
I/O13
I/O5
V
CC
I/O12
I/O4
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
/OE
GND
/CE1
A0
A0 - A16
/CE1, CE2
/WE
/OE
/LB, /UB
V
CC
GND
NC
IC
Note
: Address inputs
: Chip Enable 1, 2
: Write Enable
: Output Enable
: Byte data select
: Power supply
: Ground
: No Connection
: Internal Connection
I/O1 - I/O16 : Data inputs / outputs
Note
Leave this pin unconnected or connect to GND.
Remark
Refer to
Package Drawing
for the 1-pin index mark.
Data Sheet M14671EJ9V0DS
3