SMJ320C30HFGM40 datasheet, PDF

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SMJ320C30HFGM40: DescriptionDigital Signal Processor 196-CFP -55 to 125; CategoryThe embedded processor and controller Microcontrollers and processors; File Size618KB，44 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SMJ320C30HFGM40 Overview

Digital Signal Processor 196-CFP -55 to 125

SMJ320C30HFGM40 Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	QFP
package instruction	GQFF, TPAK196,2.5SQ,25
Contacts	196
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Address bus width	24
barrel shifter	YES
bit size	32
boundary scan	NO
maximum clock frequency	40 MHz
External data bus width	32
Format	FLOATING POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-CQFP-F196
length	34.29 mm
low power mode	YES
Number of DMA channels	1
Number of external interrupt devices	4
Number of serial I/Os	2
Number of terminals	196
Number of timers	2
On-chip data RAM width	32
On-chip program ROM width	32
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	GQFF
Encapsulate equivalent code	TPAK196,2.5SQ,25
Package shape	SQUARE
Package form	FLATPACK, GUARD RING
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	1024
ROM programmability	MROM
Filter level	MIL-PRF-38535
Maximum seat height	3.3 mm
Maximum slew rate	600 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	FLAT
Terminal pitch	0.635 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	34.29 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER

SMJ320C30HFGM40 Related Products

	SMJ320C30HFGM40	SM320C30HFGM33	SM320C30TBM33	SM320C30GBM33
Description	Digital Signal Processor 196-CFP -55 to 125	32-BIT, 33.33MHz, OTHER DSP, CQFP196	32-BIT, 33.33MHz, OTHER DSP, UUC203	32-BIT, 33.33MHz, OTHER DSP, CPGA181
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
package instruction	GQFF, TPAK196,2.5SQ,25	GQFF, TPAK196,2.5SQ,25	DIE, TAB,244PIN	PGA, PGA181M,15X15
Reach Compliance Code	not_compliant	not_compliant	unknown	not_compliant
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Address bus width	24	24	24	24
barrel shifter	YES	YES	YES	YES
bit size	32	32	32	32
boundary scan	NO	NO	NO	NO
maximum clock frequency	40 MHz	33.33 MHz	33.33 MHz	33.33 MHz
External data bus width	32	32	32	32
Format	FLOATING POINT	FIXED POINT	FIXED POINT	FIXED POINT
Integrated cache	NO	NO	NO	NO
Internal bus architecture	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE
JESD-30 code	S-CQFP-F196	S-CQFP-F196	S-XUUC-N203	S-CPGA-P181
low power mode	YES	YES	YES	YES
Number of DMA channels	1	1	1	1
Number of external interrupt devices	4	4	4	4
Number of serial I/Os	2	2	2	2
Number of terminals	196	196	203	181
Number of timers	2	2	2	2
On-chip data RAM width	32	32	32	32
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	GQFF	GQFF	DIE	PGA
Encapsulate equivalent code	TPAK196,2.5SQ,25	TPAK196,2.5SQ,25	TAB,244PIN	PGA181M,15X15
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, GUARD RING	FLATPACK, GUARD RING	UNCASED CHIP	GRID ARRAY
power supply	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
RAM (number of words)	1024	1024	1024	1024
Maximum slew rate	600 mA	600 mA	600 mA	600 mA
Maximum supply voltage	5.25 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.75 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	FLAT	FLAT	NO LEAD	PIN/PEG
Terminal location	QUAD	QUAD	UPPER	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER
Is it Rohs certified?	incompatible	incompatible	-	incompatible
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED
Terminal pitch	0.635 mm	0.635 mm	-	2.54 mm
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	-	NOT SPECIFIED

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