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CL7128SLC84-6

Description
Mask PLD, 6ns, 128-Cell, CMOS, PQCC84
CategoryProgrammable logic devices    Programmable logic   
File Size181KB,16 Pages
ManufacturerClear Logic
Download Datasheet Parametric View All

CL7128SLC84-6 Overview

Mask PLD, 6ns, 128-Cell, CMOS, PQCC84

CL7128SLC84-6 Parametric

Parameter NameAttribute value
MakerClear Logic
Reach Compliance Codeunknown
Other featuresNO
In-system programmableNO
JESD-30 codeS-PQCC-J84
JTAG BSTYES
Number of macro cells128
Number of terminals84
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC84,1.2SQ
Package shapeSQUARE
Package formCHIP CARRIER
power supply3.3/5,5 V
Programmable logic typeMASK PLD
propagation delay6 ns
Certification statusNot Qualified
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Laser Processed Logic Device Family
Key Features
u
Laser Processed Logic Device (LPLD™) technology offers
the ultimate combination of performance, flexibility, and
low cost
u
Functionally, architecturally, and electrically compatible
with industry-standard Altera
®
MAX
®
7000
u
High Density
-
-
-
2,500 Usable gates
128 Macrocells
120 Maximum user I/O pins
CL7128E
CL7128S
u
Laser fuse technology provides very fast, dense
interconnect routing
u
Low current consumption
u
Supports 3.3 volt or 5.0 volt I/O operation
u
Alpha particle immune
CL7000 Product Family Overview
Parameter
Useable Gates
Macrocells
Logic Blocks
Max user I/O pins
Speed Grades
CL7128E
CL7128S
2,500
128
8
100
-5, -6, -7, -10,
-12, -15, -20
84-pin PLCC
100-pin TQFP
100-pin PQFP
160-pin PQFP
CL7160E
CL7160S
3,200
160
10
104
-5, -6, -7, -10,
-12, -15, -20
84-pin PLCC
100-pin TQFP
100-pin PQFP
160-pin PQFP
CL7192E
CL7192S
3,750
192
12
124
-6, -7, -10,
-12, -15, -20
160-pin PQFP
CL7256E
CL7256S
5,000
256
16
164
-6, -7, -10,
-12, -15, -20
160-pin PQFP
208-pin PQFP
208-pin RQFP
7K tbl 01B
Packages
December 2000
Page 1
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