D2
PA
K
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
Rev. 2 — 2 March 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC convertors
Load switching
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
drain-source on-state
resistance
gate-drain charge
total gate charge
non-repetitive
drain-source
avalanche energy
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
mb
= 25 °C; V
GS
= 10 V; see
Figure 1
T
mb
= 25 °C; see
Figure 2
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
see
Figure 13
V
GS
= 10 V; I
D
= 25 A; V
DS
= 20 V;
see
Figure 14;
see
Figure 15
Min
-
-
-
-
Typ
-
-
-
6.2
Max
40
77
86
7.6
Unit
V
A
W
mΩ
Static characteristics
Dynamic characteristics
Q
GD
Q
G(tot)
E
DS(AL)S
-
-
-
3.8
21
-
-
-
43
nC
nC
mJ
Avalanche ruggedness
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 77 A;
V
sup
≤
40 V; unclamped; R
GS
= 50
Ω
NXP Semiconductors
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT404 (D2PAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
PSMN8R0-40BS
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
T
sld(M)
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; t
p
≤
10 µs; T
mb
= 25 °C
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 77 A;
V
sup
≤
40 V; unclamped; R
GS
= 50
Ω
V
GS
= 10 V; T
mb
= 100 °C; see
Figure 1
V
GS
= 10 V; T
mb
= 25 °C; see
Figure 1
pulsed; t
p
≤
10 µs; T
mb
= 25 °C;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
j
≥
25 °C; T
j
≤
175 °C; R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
-
Max
40
40
20
55
77
309
86
175
175
260
77
309
43
Unit
V
V
V
A
A
A
W
°C
°C
°C
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
PSMN8R0-40BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
2 of 14
NXP Semiconductors
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
80
I
D
(A)
60
003aad067
120
P
der
(%)
80
03aa16
40
40
20
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aad298
10
3
I
D
(A)
10
2
10
μs
Limit R
DSon
= V
DS
/ I
D
100
μs
10
DC
1 ms
10 ms
100 ms
1
10
-1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN8R0-40BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
3 of 14
NXP Semiconductors
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
1.2
50
Max
1.74
-
Unit
K/W
K/W
thermal resistance from junction to see
Figure 4
mounting base
thermal resistance from junction to minimum footprint; mounted on a
ambient
printed circuit board
10
Z
th(j-mb)
(K/W)
1
δ
= 0.5
0.2
0.1
0.05
0.02
10
-2
P
003aad068
10
-1
δ
=
t
p
T
10
-3
single shot
t
p
T
t
10
-4
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN8R0-40BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
4 of 14
NXP Semiconductors
PSMN8R0-40BS
N-channel 40 V 7.6 mΩ standard level MOSFET in D2PAK
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 10;
see
Figure 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
see
Figure 10;
see
Figure 11
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 10;
see
Figure 11
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 40 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 40 V; V
GS
= 0 V; T
j
= 125 °C
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 25 A; T
j
= 100 °C;
see
Figure 12;
see
Figure 13
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
see
Figure 13
R
G
internal gate resistance f = 1 MHz
(AC)
total gate charge
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
V
DS
= 12 V; R
L
= 0.5
Ω;
V
GS
= 10 V;
R
G(ext)
= 4.7
Ω
I
D
= 25 A; V
DS
= 20 V; V
GS
= 10 V;
see
Figure 14;
see
Figure 15
I
D
= 25 A; V
DS
= 20 V; see
Figure 14
V
DS
= 12 V; V
GS
= 0 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 16
I
D
= 0 A; V
DS
= 0 V; V
GS
= 10 V
I
D
= 25 A; V
DS
= 20 V; V
GS
= 10 V;
see
Figure 14;
see
Figure 15
I
D
= 25 A; V
DS
= 20 V; V
GS
= 10 V;
see
Figure 14
Min
36
40
-
1
2
-
-
-
-
-
-
-
Typ
-
-
-
-
3
-
-
-
-
-
6.2
1.1
Max
-
-
4.6
-
4
1.5
30
100
100
11
7.6
-
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
Ω
Tested to JEDEC standards where applicable.
Static characteristics
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GS(th)
Q
GS(th-pl)
Q
GD
V
GS(pl)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
-
-
-
-
-
-
-
-
-
-
-
-
-
-
17
21
7.2
3.6
3.6
3.8
4.8
1262
327
160
12
4.7
21
4.7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
nC
V
pF
pF
pF
ns
ns
ns
ns
PSMN8R0-40BS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 2 March 2012
5 of 14
京公网安备 11010802033920号
EEWORLD
