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3 nV/√Hz Ultralow Distortion,
High Speed Op Amp
AD8045
FEATURES
Ultralow distortion
SFDR
−101 dBc @ 5 MHz
−90 dBc @ 20 MHz
−63 dBc @ 70 MHz
Third-order intercept
43 dBm @ 10 MHz
Low noise
3 nV/√Hz
3 pA/√Hz
High speed
1 GHz, −3 dB bandwidth (G = +1)
1350 V/µs slew rate
7.5 ns settling time to 0.1%
Standard and low distortion pinout
Supply current: 15 mA
Offset voltage: 1.0 mV max
Wide supply voltage range: 3.3 V to 12 V
APPLICATIONS
Instrumentation
IF and baseband amplifiers
Active filters
ADC drivers
DAC buffers
CONNECTION DIAGRAMS
NC
FEEDBACK
–IN
+IN
1
2
3
4
8
7
6
5
+V
S
OUTPUT
NC
–V
S
04814-0-001
Figure 1. 8-Lead AD8045 LFCSP (CP-8)
FEEDBACK
1
–IN
2
+IN
3
–V
S 4
8
NC
+
V
S
OUTPUT
NC
04814-0-001
7
6
5
Figure 2. 8-Lead AD8045 SOIC/EP (RD-8)
GENERAL DESCRIPTION
The AD8045 is a unity gain stable voltage feedback amplifier
with ultralow distortion, low noise, and high slew rate. With a
spurious-free dynamic range of −90 dBc @ 20 MHz, the
AD8045 is an ideal solution in a variety of applications,
including ultrasound, ATE, active filters, and ADC drivers.
ADI’s proprietary next generation XFCB process and innovative
architecture enables such high performance amplifiers.
The AD8045 features a low distortion pinout for the LFCSP,
which improves second harmonic distortion and simplifies the
layout of the circuit board.
The AD8045 has 1 GHz bandwidth, 1350 V/µs slew rate, and
settles to 0.1% in 7.5 ns. With a wide supply voltage range (3.3 V
to 12 V) and low offset voltage (200 µV), the AD8045 is an ideal
candidate for systems that require high dynamic range, preci-
sion, and high speed.
The AD8045 amplifier is available in a 3 mm × 3 mm LFCSP
and the standard 8-lead SOIC. Both packages feature an
exposed paddle that provides a low thermal resistance path to
the PCB. This enables more efficient heat transfer, and increases
reliability. The AD8045 works over the extended industrial
temperature range (−40°C to +125°C).
–20
G = +1
–30 V
S
= ±5V
V
OUT
= 2V p-p
–40 R
L
= 1kΩ
R
S
= 100Ω
–50
–60
–70
–80
HD3 LFCSP
–90
–100
–110
–120
0.1
04814-0-079
HARMONIC DISTORTION (dBc)
HD2 LFCSP
1
10
FREQUENCY (MHz)
100
Figure 3. Harmonic Distortion vs. Frequency for Various Packages
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD8045
TABLE OF CONTENTS
Specifications with ±5 V Supply ..................................................... 3
Specifications with +5 V Supply ..................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Circuit Configurations................................................................... 16
Wideband Operation ................................................................. 16
Theory of Operation ...................................................................... 17
Frequency Response................................................................... 17
DC Errors .................................................................................... 17
Output Noise............................................................................... 18
Applications..................................................................................... 19
Low Distortion Pinout............................................................... 19
High Speed ADC Driver ........................................................... 19
90 MHz Active Low-Pass Filter (LPF) ..................................... 20
Printed Circuit Board Layout ....................................................... 22
Signal Routing............................................................................. 22
Power Supply Bypassing ............................................................ 22
Grounding ................................................................................... 22
Exposed Paddle........................................................................... 23
Driving Capacitive Loads.......................................................... 23
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
REVISION HISTORY
9/04—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Features......................................................................... 1
Changes to Specifications ............................................................... 4
Changes to Figure 58..................................................................... 15
Changes to Figure 63..................................................................... 17
Changes to Frequency Response Section ................................... 17
Changes to Figure 64..................................................................... 17
Changes to DC Errors Section..................................................... 17
Changes to Figure 65..................................................................... 17
Changes to Figure 66..................................................................... 18
Changes to Output Noise Section ............................................... 18
Changes to Ordering Guide ......................................................... 24
7/04—Revision 0: Initial Version
Rev. A | Page 2 of 24
AD8045
SPECIFICATIONS WITH ±5 V SUPPLY
T
A
= 25°C, G = +1, R
S
= 100 Ω, R
L
= 1 kΩ to ground, unless noted otherwise. Exposed paddle must be floating or connected to −V
S
.
Table 1.
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Conditions
G = +1, V
OUT
= 0.2 V p-p
G = +1, V
OUT
= 2 V p-p
G = +2, V
OUT
= 0.2 V p-p
G = +2, V
OUT
= 2 V p-p, R
L
= 150 Ω
G = +1, V
OUT
= 4 V step
G = +2, V
OUT
= 2 V step
f
C
= 5 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f
C
= 20 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f
C
= 70 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f = 100 kHz
f = 100 kHz
NTSC, G = +2, R
L
= 150 Ω
NTSC, G = +2, R
L
= 150 Ω
Min
Typ
1000
350
400
55
1350
7.5
Max
Unit
MHz
MHz
MHz
V/µs
ns
300
320
1000
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (dBc) HD2/HD3
−102/−101
−106/−101
−98/−90
−97/−90
−71/−71
−60/−71
3
3
0.01
0.01
0.2
8
2
8
0.2
64
3.6/1.0
1.3
±3.8
−91
8
−3.9 to +3.9
−3.6 to +3.6
70
90/170
18
±5
16
−68
−73
±6
19
1.0
6.3
1.3
dBc
dBc
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
%
Degrees
mV
µV/°C
µA
nA/°C
µA
dB
MΩ
pF
V
dB
ns
V
V
mA
mA
pF
V
mA
dB
dB
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Output Voltage Swing
Output Current
Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current
Positive Power Supply Rejection
Negative Power Supply Rejection
See Figure 54
V
OUT
= −3 V to +3 V
Common-mode/differential
Common-mode
V
CM
= ±1 V
V
IN
= ±3 V, G = +2
R
L
= 1 kΩ
R
L
= 100 Ω
Sinking/sourcing
30% overshoot, G = +2
62
−83
−3.8 to +3.8
−3.4 to +3.5
±1.65
+V
S
= +5 V to +6 V, −V
S
= −5 V
+V
S
= +5 V, −V
S
= −5 V to −6 V
−61
−66
Rev. A | Page 3 of 24
AD8045
SPECIFICATIONS WITH +5 V SUPPLY
T
A
= 25°C, G = +1, R
S
= 100 Ω, R
L
= 1 kΩ to midsupply, unless otherwise noted. Exposed paddle must be floating or connected to −V
S
.
Table 2.
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Conditions
G = +1, V
OUT
= 0.2 V p-p
G = +1, V
OUT
= 2 V p-p
G = +2, V
OUT
= 0.2 V p-p
G = +2, V
OUT
= 2 V p-p, R
L
= 150 Ω
G = +1, V
OUT
= 2 V step
G = +2, V
OUT
= 2 V step
f
C
= 5 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f
C
= 20 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f
C
= 70 MHz, V
OUT
= 2 V p-p
LFCSP
SOIC
f = 100 kHz
f = 100 kHz
NTSC, G = +2, R
L
= 150 Ω
NTSC, G = +2, R
L
= 150 Ω
Min
Typ
900
200
395
60
1060
10
Max
Unit
MHz
MHz
MHz
MHz
V/µs
ns
160
320
480
Bandwidth for 0.1 dB Flatness
Slew Rate
Settling Time to 0.1%
NOISE/HARMONIC PERFORMANCE
Harmonic Distortion (dBc) HD2/HD3
−89/−83
−92/−83
−81/−70
−83/−70
−57/−46
−57/−46
3
3
0.01
0.01
0.5
7
2
7
0.2
63
3/0.9
1.3
1.2 to 3.8
−94
10
1.1 to 4.0
1.2 to 3.8
55
70/140
15
5
15
−67
−73
12
18
1.4
6.6
1.3
dBc
dBc
dBc
dBc
dBc
dBc
nV/√Hz
pA/√Hz
%
Degrees
mV
µV/°C
µA
nA/°C
µA
dB
MΩ
pF
V
dB
ns
V
V
mA
mA
pF
V
mA
dB
dB
Input Voltage Noise
Input Current Noise
Differential Gain Error
Differential Phase Error
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Input Common-Mode Voltage Range
Common-Mode Rejection
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Output Voltage Swing
Output Current
Short-Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current
Positive Power Supply Rejection
Negative Power Supply Rejection
See Figure 54
V
OUT
= 2 V to 3 V
Common-mode/differential
Common-mode
V
CM
= 2 V to 3 V
V
IN
= −0.5 V to +3 V, G = +2
R
L
= 1 kΩ
R
L
= 100 Ω
Sinking/sourcing
30% overshoot, G = +2
61
−78
2.2 to 3.7
2.5 to 3.5
3.3
+V
S
= +5 V to +6 V, −V
S
= 0 V
+V
S
= +5 V, −V
S
= 0 V to −1 V
−65
−70
Rev. A | Page 4 of 24
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