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PSMN063-150D
N-channel TrenchMOS SiliconMAX standard level FET
Rev. 04 — 17 December 2009
Product data sheet
1. Product profile
1.1 General description
SiliconMAX standard level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Higher operating power due to low
thermal resistance
Low conduction losses due to low
on-state resistance
Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
DC-to-DC convertors
Switched-mode power supplies
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
Quick reference
Conditions
T
mb
= 25 °C; V
GS
= 10 V;
see
Figure 1
and
3
T
mb
= 25 °C; see
Figure 2
Min
-
-
-
Typ
-
-
-
Max
150
29
150
Unit
V
A
W
drain-source voltage T
j
≥
25 °C; T
j
≤
175 °C
drain current
total power
dissipation
drain-source
on-state resistance
Symbol Parameter
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 15 A;
T
j
= 25 °C; see
Figure 10
and
11
-
60
63
mΩ
NXP Semiconductors
PSMN063-150D
N-channel TrenchMOS SiliconMAX standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol
G
D
S
D
Description
gate
drain
source
mounting base; connected to
drain
2
1
3
[1]
Simplified outline
mb
Graphic symbol
D
G
mbb076
S
SOT428 (DPAK)
[1]
It is not possible to make a connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
PSMN063-150D
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads (one
lead cropped)
Version
SOT428
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
mb
= 25 °C
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
V
GS
= 10 V; T
mb
= 100 °C; see
Figure 1
and
3
V
GS
= 10 V; T
mb
= 25 °C; see
Figure 1
and
3
t
p
≤
10 µs; pulsed; T
mb
= 25 °C; see
Figure 3
T
mb
= 25 °C; see
Figure 2
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
j
≥
25 °C; T
j
≤
175 °C; R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
Max
150
150
20
20
29
116
150
175
175
29
116
502
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
non-repetitive
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 26 A; V
sup
≤
25 V;
drain-source avalanche t
p
= 0.2 ms; unclamped; R
GS
= 50
Ω
energy
non-repetitive
avalanche current
V
sup
≤
25 V; V
GS
= 10 V; T
j(init)
= 25 °C;
R
GS
= 50
Ω;
unclamped
I
AS
-
29
A
PSMN063-150D_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 17 December 2009
2 of 12
NXP Semiconductors
PSMN063-150D
N-channel TrenchMOS SiliconMAX standard level FET
120
I
der
(%)
80
03aa24
120
P
der
(%)
80
03aa16
40
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aaa148
10
3
I
D
(A)
10
2
t
p
= 10
μs
100
μs
1 ms
100 ms
10 ms
R
DSon
= V
DS
/ I
D
10
DC
1
10
−1
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN063-150D_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 17 December 2009
3 of 12
NXP Semiconductors
PSMN063-150D
N-channel TrenchMOS SiliconMAX standard level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to
mounting base
thermal resistance from junction to
ambient
Conditions
see
Figure 4
vertical in still air
Min
-
-
Typ
-
50
Max
1
-
Unit
K/W
K/W
10
Z
th(j-mb)
(K/W)
1
δ
=
0.5
0.2
10
−1
0.1
0.05
0.02
P
003aaa149
δ
=
t
p
T
10
−2
single pulse
t
p
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN063-150D_4
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 17 December 2009
4 of 12
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