FXLA104 — Low-Voltage Dual-Supply 4-Bit Voltage Translator
July 2012
FXLA104
Low-Voltage Dual-Supply 4-Bit Voltage Translator with
Configurable Voltage Supplies and Signal Levels,
3-State Outputs, and Auto Direction Sensing
Features
Bi-Directional Interface between Two Levels:
from 1.1V to 3.6V
Fully Configurable: Inputs and Outputs Track V
CC
Non-Preferential Power-Up; Either V
CC
May Be
Powered Up First
Outputs Switch to 3-State if Either V
CC
is at GND
Power-Off Protection
Bus-Hold on Data Inputs Eliminates the Need for
Pull-Up Resistors; Do Not Use Pull-Up Resistors on
A or B Ports
Control Input (/OE) Referenced to V
CCA
Voltage
Available in 16-Terminal UMLP (1.8mm x 2.6mm)
and 12-Terminal, Quad UMLP, 1.8 x 1.8mm
Packages
Direction Control Not Necessary
100Mbps Throughput when Translating Between
1.8V and 2.5V
ESD Protection Exceeds:
- 8kV HBM (per JESD22-A114 & Mil Std 883e
3015.7)
- 2kV CDM (per ESD STM 5.3)
Description
The FXLA104 is a configurable dual-voltage supply
translator for both uni-directional and bi-directional
voltage translation between two logic levels. The device
allows translation between voltages as high as 3.6V to
as low as 1.1V. The A port tracks the V
CCA
level and the
B port tracks the V
CCB
level. This allows for bi-directional
voltage translation over a variety of voltage levels: 1.2V,
1.5V, 1.8V, 2.5V, and 3.3V.
The device remains in three-state as long as either
V
CC
=0V, allowing either V
CC
to be powered up first.
Internal power-down control circuits place the device in
3-state if either V
CC
is removed.
The /OE input, when HIGH, disables both the A and B
ports by placing them in a 3-state condition. The /OE
input is supplied by V
CCA
.
The FXLA104 supports bi-directional translation without
the need for a direction control pin. The two ports of the
device have auto-direction sense capability. Either port
may sense an input signal and transfer it as an output
signal to the other port.
Applications
Cell Phone, PDA, Digital Camera, Portable GPS
Ordering Information
Part Number
FXLA104UMX
FXLA104UM12X
Operating
Temperature
Range
-40 to 85°C
Top Mark
XJ
XJ
Package
16-Terminal UMLP 1.8 x 2.6mm Package
12-Terminal, Quad UMLP, 1.8 x 1.8mm Package
Packing
Method
5K Units Tape
and Reel
© 2009 Fairchild Semiconductor Corporation
FXLA104 • Rev. 1.0.9
www.fairchildsemi.com
FXLA104 — Low-Voltage Dual-Supply 4-Bit Voltage Translator
Pin Configuration
B0
12
B1
11
B2
10
B3
9
8
7
6
5
V
CCB
NC
NC
V
CCA
13
14
15
16
1
2
3
4
/OE
GND
GND
NC
A0
A1
A2
A3
Figure 2. 12-Pin UMLP (Top Through View)
Figure 1. 16-Pin UMLP (Top Through View)
Pin Definitions
16 Pin #
1
2
3
4
5
6,7
8
9
10
11
12
13
14,15
16
2
7
8
9
10
11
12
1
12 Pin #
3
4
5
6
Name
A0
A1
A2
A3
NC
GND
/OE
B3
B2
B1
B0
V
CCB
NC
V
CCA
Description
A-Side Inputs or 3-State Outputs
A-Side Inputs or 3-State Outputs
A-Side Inputs or 3-State Outputs
A-Side Inputs or 3-State Outputs
No Connect
Ground
Output Enable Input
B-Side Inputs or 3-State Outputs
B-Side Inputs or 3-State Outputs
B-Side Inputs or 3-State Outputs
B-Side Inputs or 3-State Outputs
B-Side Power Supply
No Connect
A-Side Power Supply
© 2009 Fairchild Semiconductor Corporation
FXLA104 • Rev. 1.0.9
www.fairchildsemi.com
2
FXLA104 — Low-Voltage Dual-Supply 4-Bit Voltage Translator
Functional Diagram
Figure 3. Functional Diagram
Function Table
Control
/OE
LOW Logic Level
HIGH Logic Level
Normal Operation
3-State
Outputs
© 2009 Fairchild Semiconductor Corporation
FXLA104 • Rev. 1.0.9
www.fairchildsemi.com
3
FXLA104 — Low-Voltage Dual-Supply 4-Bit Voltage Translator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
I
Parameter
Supply Voltage
DC Input Voltage
V
CCA
V
CCB
Conditions
Min.
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
Max.
4.6
4.6
4.6
4.6
4.6
V
CCA
+0.5
V
CCB
+0.5
-50
-50
+50
Unit
V
V
I/O Ports A and B
Control Input (/OE)
Output 3-State
Output Active (A
n
)
Output Active (B
n
)
V
IN
<0V
V
O
<0V
V
O
>V
CC
V
O
I
IK
I
OK
I
OH
/I
OL
I
CC
T
STG
P
D
Output Voltage
(2)
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
V
mA
mA
mA
mA
°C
mW
-50
-65
+50
±100
+150
17
DC V
CC
or Ground Current (per Supply Pin)
Storage Temperature Range
Power Dissipation
Electrostatic Discharge
Capability
Human Body Model (per JESD22-
A114 & Mil Std 883e 3015.7)
Charged Device Model
(per ESD STM 5.3)
8
kV
2
ESD
Notes:
1. I
O
absolute maximum ratings must be observed.
2. All unused inputs and input/outputs must be held at V
CCi
or GND.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
T
A
dt/dV
Θ
JA
Θ
JC
Parameter
Power Supply
Input Voltage
Operating Temperature, Free Air
Minimum Input Edge Rate
Thermal Resistance:
Junction-to-Ambient
Thermal Resistance:
Junction-to-Case
Conditions
Operating V
CCA
or V
CCB
Ports A and B
Control Input (/OE)
V
CCA/B
= 1.1 to 3.6V
UMLP-16
UMLP-12
UMLP-16
UMLP-12
Min.
1.1
0
0
-40
Max.
3.6
3.6
V
CCA
+85
10
315
300
155
165
Unit
V
V
V
°C
ns/V
°C/W
°C/W
© 2009 Fairchild Semiconductor Corporation
FXLA104 • Rev. 1.0.9
www.fairchildsemi.com
4
FXLA104 — Low-Voltage Dual-Supply 4-Bit Voltage Translator
Power-Up/Power-Down Sequence
FXL translators offer an advantage in that either V
CC
may be powered up first. This benefit derives from the
chip design. When either V
CC
is at 0V, outputs are in a
high-impedance state. The control input (/OE) is
designed to track the V
CCA
supply. A pull-up resistor
tying /OE to V
CCA
should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up or power-down. The size of the
pull-up resistor is based upon the current-sinking
capability of the device driving the /OE pin.
The recommended power-up sequence is:
1.
2.
3.
Apply power to the first V
CC
.
Apply power to the second V
CC
.
Drive the /OE input LOW to enable the device.
The recommended power-down sequence is:
1.
2.
3.
Drive /OE input HIGH to disable the device.
Remove power from either V
CC
.
Remove power from other V
CC.
Pull-Up/Pull-Down Resistors
Do not use pull-up or pull-down resistors. This device
has bus-hold circuits: pull-up or pull-down resistors are
not recommended because they interfere with the
output state. The current through these resistors may
exceed the hold drive, I
I(HOLD)
and/or I
I(OD)
bus-hold
currents, resulting in data transition and/or auto-
direction sensing failures. The bus-hold feature
eliminates the need for extra resistors.
© 2009 Fairchild Semiconductor Corporation
FXLA104 • Rev. 1.0.9
www.fairchildsemi.com
5
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