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AN5767K

Description
Synchronizing signal processing IC
CategoryOther integrated circuit (IC)    Consumption circuit   
File Size64KB,6 Pages
ManufacturerPanasonic
Websitehttp://www.panasonic.co.jp/semicon/e-index.html
Download Datasheet Parametric Compare View All

AN5767K Overview

Synchronizing signal processing IC

AN5767K Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeSIP
package instructionSSIP, SIP13,.05,70
Contacts13
Reach Compliance Codeunknow
Commercial integrated circuit typesCONSUMER CIRCUIT
JESD-30 codeR-PSIP-T13
JESD-609 codee0
length23.32 mm
Number of functions1
Number of terminals13
Maximum operating temperature75 °C
Minimum operating temperature-25 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSIP
Encapsulate equivalent codeSIP13,.05,70
Package shapeRECTANGULAR
Package formIN-LINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply12 V
Certification statusNot Qualified
Maximum seat height8.65 mm
Maximum slew rate7.2 mA
Maximum supply voltage (Vsup)13.2 V
Minimum supply voltage (Vsup)10.8 V
surface mountNO
technologyBIPOLAR
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch1.778 mm
Terminal locationSINGLE
Maximum time at peak reflow temperatureNOT SPECIFIED
width3 mm
Base Number Matches1
ICs for TV
AN5767K
Synchronizing signal processing IC
s
Overview
The AN5767K is a synchronizing signal processing
IC with built-in frequency divider circuit for horizontal
and vertical synchronizing signal. Input signal is output-
ted after being devided by two.
1.778
2.5±0.25
6.0±0.3
3.5±0.25
13
1.1±0.25
0.5±0.1
Unit: mm
s
Features
Built-in dividing-by-two circuit for horizontal synchro-
nizing signal
Built-in dividing-by-two circuit for vertical synchroniz-
ing signal
On/off switch function of dividing output
Gain control function of dividing output
23.32±0.3
1.65±0.25
1
0.3
–0.05
3.0±0.3
+0.1
s
Applications
CRT monitors
SSIP013-P-0000
s
Block Diagram
0 V to 5 V
4
10
5
13
1
V
CC
1.1±0.25
Gain
control
SW
11
Out-H
0 V to 5 V
Gain
control
SW
2
Out-V
12
7
6
9
On/off
GND1
GND2
H-sync.
8
V-sync.
On/off
3
1

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