Holtek 32-bit Microcontroller with ARM
®
Cortex™-M3 Core
HT32F1251/51B/52/53 Series
Datasheet
Revision: V1.10
Date: ½½½i½ 1½½ ½01½
½½-bit ½RM Co½tex™-M½ MCU
HT½½F1½51/51B/5½/5½
Table of Contents
1 General Description................................................................................................ 6
2 Features ................................................................................................................... 7
Co½e ....................................................................................................................................... 7
On-chi½ Memo½y .................................................................................................................... 7
F½ash Memo½y Cont½o½½e½ ....................................................................................................... 8
Reset Cont½o½ Unit ................................................................................................................. 8
C½ock Cont½o½ Unit .................................................................................................................. 8
Powe½ Management ............................................................................................................... 9
½na½og to Digita½ Conve½te½ .................................................................................................... 9
Analog Operational Amplifier/Comparator
............................................................................. 9
I/O Po½ts ............................................................................................................................... 10
PWM Gene½ation and Ca½tu½e Time½s ................................................................................. 10
Watchdog Time½ ................................................................................................................... 11
Rea½ Time C½ock ................................................................................................................... 11
Inte½-integ½ated Ci½cuit (I
½
C) ................................................................................................. 1½
Se½ia½ Pe½i½he½a½ Inte½face (SPI) .......................................................................................... 1½
Unive½sa½ Synch½onous ½synch½onous Receive½ T½ansmitte½ (US½RT)............................... 1½
Debug Su½½o½t ..................................................................................................................... 1½
Package and O½e½ation Tem½e½atu½e .................................................................................. 1½
Table of Contents
3 Overview ................................................................................................................ 14
Device Info½mation ............................................................................................................... 14
B½ock Diag½am ..................................................................................................................... 15
Memo½y Ma½ ........................................................................................................................ 16
C½ock St½uctu½e .................................................................................................................... 17
Pin ½ssignment .................................................................................................................... 18
4 Electrical Characteristics ..................................................................................... 22
½bso½ute Maximum Ratings ................................................................................................. ½½
DC Cha½acte½istics ............................................................................................................... ½½
On-Chi½ LDO Vo½tage Regu½ato½ Cha½acte½istics ................................................................. ½½
Powe½ Consum½tion ............................................................................................................ ½½
Reset and Su½½½y Monito½ Cha½acte½istics ........................................................................... ½½
Exte½na½ C½ock Cha½acte½istics ............................................................................................. ½4
Inte½na½ C½ock Cha½acte½istics .............................................................................................. ½5
PLL Cha½acte½istics .............................................................................................................. ½6
Memo½y Cha½acte½istics ....................................................................................................... ½6
Rev. 1.10
½ of ½5
½½½i½ 1½½ ½01½
½½-bit ½RM Co½tex™-M½ MCU
HT½½F1½51/51B/5½/5½
I/O Po½t Cha½acte½istics ........................................................................................................ ½6
½DC Cha½acte½istics ............................................................................................................ ½8
Operation Amplifier/Comparator Characteristics
................................................................. ½9
GPTM Cha½acte½istics .......................................................................................................... ½9
I
½
C Cha½acte½istics ............................................................................................................... ½0
SPI Cha½acte½istics .............................................................................................................. ½1
Table of Contents
5 Package Information ............................................................................................ 33
48-½in LQFP (7mmx7mm) Out½ine Dimensions ................................................................... ½½
Rev. 1.10
½ of ½5
½½½i½ 1½½ ½01½
½½-bit ½RM Co½tex™-M½ MCU
HT½½F1½51/51B/5½/5½
List of Tables
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
Tab½e
1. HT½½F1½5x Se½ies Featu½es and Pe½i½he½a½ List ..................................................................... 14
½. HT½½F1½5x Pin Desc½i½tions ................................................................................................... ½0
½. ½bso½ute Maximum Ratings ...................................................................................................... ½½
4. DC O½e½ating Conditions ......................................................................................................... ½½
5. LDO Cha½acte½istics ................................................................................................................. ½½
6. Powe½ Consum½tion Cha½acte½istics ........................................................................................ ½½
7. LVD/BOD Cha½acte½istics ......................................................................................................... ½½
8. High S½eed Exte½na½ C½ock (HSE) Cha½acte½istics ................................................................... ½4
9. Low S½eed Exte½na½ C½ock (LSE) Cha½acte½istics .................................................................... ½4
10. High S½eed Inte½na½ C½ock (HSI) Cha½acte½istics ................................................................... ½5
11. Low S½eed Inte½na½ C½ock (LSI) Cha½acte½istics ..................................................................... ½5
1½. PLL Cha½acte½istics ................................................................................................................ ½6
1½. F½ash Memo½y Cha½acte½istics ................................................................................................ ½6
14. I/O Po½t Cha½acte½istics .......................................................................................................... ½6
15. ½DC Cha½acte½istics ............................................................................................................... ½8
16. OP½/CMP Cha½acte½istics ...................................................................................................... ½9
17. GPTM Cha½acte½istics ............................................................................................................ ½9
18. I
½
C Cha½acte½istics .................................................................................................................. ½0
19. SPI Cha½acte½istics ................................................................................................................. ½1
List of Tables
Rev. 1.10
4 of ½5
½½½i½ 1½½ ½01½
½½-bit ½RM Co½tex™-M½ MCU
HT½½F1½51/51B/5½/5½
List of Figures
Figu½e
Figu½e
Figu½e
Figu½e
Figu½e
Figu½e
Figu½e
Figu½e
Figu½e
1.
½.
½.
4.
5.
6.
7.
8.
9.
HT½½F1½5x B½ock Diag½am .................................................................................................... 15
HT½½F1½5x Memo½y Ma½ ....................................................................................................... 16
HT½½F1½5x C½ock St½uctu½e Diag½am ..................................................................................... 17
HT½½F1½51B 48LQFP Pin ½ssignment .................................................................................. 18
HT½½F1½51/5½/5½ 48LQFP Pin ½ssignment........................................................................... 19
½DC Sam½½ing Netwo½k Mode½ ............................................................................................... ½8
I
½
C Timing Diag½am ................................................................................................................. ½0
SPI Timing Diag½am – SPI Maste½ Mode ................................................................................ ½1
SPI Timing Diag½am – SPI S½ave Mode and CPH½=1 ............................................................ ½½
List of Figures
Rev. 1.10
5 of ½5
½½½i½ 1½½ ½01½