SL2150F
Front End Power Splitter with AGC
Data Sheet
October
2005
Features
•
Single chip quadruple power splitter (primary
channel, secondary channel, OOB channel and
loop through)
Wide dynamic range on all channels
Independent AGC facility incorporated into all
channel paths
CSO, CTB, CXM all better than -62dBc for
+3dBmV agc attack point
Full ESD protection. (Normal ESD handling
procedures should be observed)
Ordering Information
SL2150F/KG/LH2S 28 Pin QFN Tubes
SL2150F/KG/LH2T 28 Pin QFN Tape & Reel
SL2150F/KG/LH3T 28 Pin QFN* Tape & Reel
SL2150F/KG/LH3S 28 Pin QFN* Tubes
*Pb Free Matte Tin
•
•
•
•
•
Description
The SL2150F is a wide dynamic range single chip power
splitter for cable set top box multi-tuner applications.
The device offers four buffered outputs from a single
input.
All signal paths contain an independently controllable
AGC facility.
Applications
•
•
•
Multi-tuner cable set top box and cable modem
applications
Data communications systems
Terrestrial TV tuner loop though
AGC1
AGC2
AGC3
AGC4
AGC
Control
RFOUT1
RFOUT1B
AGC
Control
RFINPUT
RFINPUTB
Power
Splitter
AGC
Control
RFOUT2
RFOUT2B
RFOUT3
RFOUT3B
AGC
Control
RFOUT4
RFOUT4B
Figure 1 - SL2150F Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved.
SL2150F
FROUT1B
RFOUT2B
RFOUT1
RFOUT2
Data Sheet
NC#
NC#
Vee
Vee
RFOUT4
RFOUT4B
Vcc
Vcc
Vcc
VEE
(PACKAGE
PADDLE)
1
AGC1
RF INPUT
RF INPUT
AGC2
Vee
Vcc
Vcc
SL2150F
NC#
Vee
Vee
RFOUT3
RFOUT3B
NC#
AGC4
AGC3
LH28
# Pins marked NC should be connected to Vee
Figure 2 - Pin Allocation
2
Zarlink Semiconductor Inc.
SL2150F
1.0
Quick Reference Data
Data Sheet
NB all data applies with differential termination and single ended source both of 75
Ω.
Characteristics
RF input operating range
Conversion gain, with external load as in Figure 12
maximum
minimum
Input NF, all signal paths at maximum conversion gain
IPIP3, all paths
IPIP2, all paths
CTB*
CSO*
CXM*
Input impedance
Input VSWR
Output impedance differential, all loops (requires external load for example
as in Figure 12)
Input to output isolation (all loops)
Output to output isolation (all loops)
Table 1 - Quick Reference Data
*132 channel matrix at +15 dBmV per channel, 75
Ω
source impedance, all paths, max gain.
Units
50-860
5.5
-25
7
127
151
-66
-64
-66
75
8
440
30
25
MHz
dB
dB
dB
dBµV
dBµV
dBc
dBc
dBc
Ω
dB
Ω
dB
dB
3
Zarlink Semiconductor Inc.
SL2150F
2.0
Functional Description
Data Sheet
The SL2150F is a broadband wide dynamic range power splitter with AGC and is optimized for application in multi
tuner cable set top box applications. It also has application in any system where a wide dynamic range broadband
power splitter is required.
The pin assignment is contained in Figure 2 and the block diagram in Figure 1. The port internal peripheral circuits
are contained in Figure 15 - "Port Peripheral Circuitry".
In normal application the RF input is interfaced to the device input. The input preamplifier is designed for low noise
figure, within the operating region of 50 to 860 MHz and for high intermodulation distortion intercept so offering good
signal to noise plus composite distortion spurious performance when loaded with a multi carrier system. The
preamplifier when combined with the input network shown in Figure 3 - "RF Input Matching Network" provides an
impedance match to a 75
Ω
source. The typical impedance is shown in Figure 4 - "Typical Single-Ended RF Input
Impedance with Input Match".
The input NF and input referred two-tone intermodulation test condition spectrum are shown in Figure 5 - "Input NF
at 25 deg C" and Figure 6 - "Two Tone Intermodulation Test Condition Spectrum, Input Referred" respectively.
The output of the preamplifier is then power split to four independently controlled AGC stages.
Each AGC stage provides for a minimum of 30 dB of gain control across the input frequency range. The typical AGC
characteristic and NF versus gain setting are contained in Figure 7 - "Typical AGC versus Control Voltage
Characteristic" and Figure 8 - "Typical Variation in NF versus Gain Setting" respectively.
The input referred third order intercept point is independent of gain setting.
Finally, each of the AGC stages drive an output buffer of nominal differential output impedance of 440Ω, which
provides a nominal 5.5 dB of conversion gain when terminated into a differential 75Ω load.
In application it is important to avoid saturation of the output stage, therefore it is recommended that the output
standing current be sunk to Vcc through an inductor. A resistive pull up can also be used as shown in Figure 14 -
"Example Application Driving 200 Ohm Load with Resistive Pull Up", however the resistor values should not exceed
38 ohm single ended.
If an inductive current sink is used the maximum available gain from the device is circa 20 dB. This gain can be
reduced by application of an external load between the differential output ports. The gain can be approximately
calculated from the following formula:
GAIN = 20*log ((Parallel combination of 440 ohm and external load between ports) / 44 ohm) + 2dB
For example, when driving a 200 ohm load as in Figure 13 - "Example Application Driving 200 Ohm Load with
Inductive Pull Up", the gain equals
Gain
= 20 *log ((440 * 200)/(440+200)/44) +2dB
= 12dB.
4
Zarlink Semiconductor Inc.
SL2150F
Data Sheet
1nF
3
RF INPUT
SL2150F
RFIN
F TYPE
5.1nH
MABAES0029
1:1
1nF
4
RF INPUTB
Figure 3 - RF Input Matching Network
CH1
S11
1 U FS
4_: 133.23
Ω
16 Nov 2001 10:10:47
55.758
Ω
10.44 nH
850.000 000 MHz
PRm
Cor
Avg
16
Smo
Z0
75
1_: 169.02
-44.117
50 MHz
Ω
Ω
Ω
Ω
Ω
Ω
Ω
2_: 49.916
-57.436
250 MHz
3_: 31.238
-5.5576
500 MHz
4
3
1
2
START 50.000 000 MHz
STOP 850.000 000 MHz
Figure 4 - Typical Single-Ended RF Input Impedance with Input Match
5
Zarlink Semiconductor Inc.
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