The documentation and process conversion measures
necessary to comply with this document shall be
completed by 11 December 2007.
INCH-POUND
MIL-PRF-19500/291R
11 September 2007
SUPERSEDING
MIL-PRF-19500/291P
16 June 2005
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, TRANSISTOR, PNP, SILICON, SWITCHING,
TYPES 2N2906A, 2N2906AL, 2N2907A, 2N2907AL, 2N2906AUA,
2N2907AUA, 2N2906AUB, 2N2906AUBC, 2N2907AUB, AND 2N2907AUBC, JAN,
JANTX, JANTXV, JANJ, JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF,
JANSG, JANSH JANHCB, JANHCD JANKCB, JANKCD JANKCBM, JANKCBD,
JANKCBP, JANKCBL, JANKCBR, JANKCBF, JANKCBG, AND JANKCBH
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for PNP, silicon, switching transistors. Five
levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two
levels of product assurance are provided for each unencapsulated device type. RHA level designators “M”, “D”, “P“,
“L” “R”, “F’, “G”, and “H” are appended to the device prefix to identify devices which have passed RHA requirements.
* 1.2 Physical dimensions. See figure 1 (similar to a TO-18), figures 2, 3, and 4 (surface mount case outlines UA,
UB, and UBC), and figures 5 and 6 (JANHC and JANKC).
*
1.3 Maximum ratings. Unless otherwise specified T
A
= +25°C.
Types
I
C
mA dc
All
devices
600
V
CBO
V dc
60
V
EBO
V dc
5
V
CEO
V dc
60
T
J
and T
STG
°C
-65 to +200
Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil.
Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database. at
http://assist.daps.dla.mil
.
AMSC N/A
FSC 5961
MIL-PRF-19500/291R
*
1.3 Maximum ratings. Unless otherwise specified T
A
= +25°C. - Continued.
Types
P
T
T
A
= +25°C
(1) (2)
W
2N2906A, L,
2N2907A, L
2N2906AUA,
2N2907AUA
2N2906AUB,
2N2907AUB
2N2906AUBC
,
2N2907AUBC
0.5
0.5
0.5 (4)
0.5 (4)
0.5 (4)
0.5 (4)
0.5 (4)
0.5 (4)
P
T
T
C
= +25°C
(1) (2)
W
1.0
1.0
N/A
N/A
N/A
N/A
N/A
N/A
P
T
T
SP(IS)
=
+25°C (1) (2)
W
N/A
N/A
1.0
1.0
1.0
1.0
1.0
1.0
P
T
T
SP(AM)
=
+25°C (1) (2)
W
N/A
N/A
1.5
1.5
N/A
N/A
N/A
N/A
R
θJA
(2) (3)
°C/W
325
325
325 (4)
325 (4)
325 (4)
325 (4)
325 (4)
325 (4)
R
θJC
(2)
(3)
°C/W
150
150
N/A
N/A
N/A
N/A
N/A
N/A
R
θJSP(IS)
(2) (3)
°C/W
N/A
N/A
110
110
90
90
90
90
R
θJSP(AM)
(2) (3)
°C/W
N/A
N/A
40
40
N/A
N/A
N/A
N/A
(1)
(2)
(3)
(4)
For derating, see figures 7, 8, 9, 10, and 11.
See 3.3 for abbreviations.
For thermal curves, see figures 12, 13, 14, 15, and 16.
For non-thermal conductive PCB or unknown PCB surface mount conditions in free air, substitute figures 7
and 12 for the UA, UB, and UBC package and use R
θJA
.
1.4 Primary electrical characteristics. Unless otherwise specified T
A
= +25°C.
h
FE
at V
CE
= 10 V dc
h
FE3
I
C
= 10 mA dc
2N2906A
L, UA,UB,
UBC
40
2N2907A
L, UA,UB,
UBC
100
h
FE1
I
C
= 0.1 mA dc
h
FE2
I
C
= 1.0 mA dc
h
FE4
(1)
I
C
= 150 mA dc
2N2906A
L, UA,UB,
UBC
40
120
2N2907A
L, UA,UB,
UBC
100
300
h
FE5
(1)
I
C
= 500 mA dc
2N2906A 2N2907A
L, UA,UB, L, UA,UB,
UBC
UBC
40
50
Min
Max
2N2906A, 2N2907A, 2N2906A
L, UA,UB, L, UA,UB, , L, UA,UB,
UBC
UBC
UBC
40
75
40
175
2N2907A
L, UA,UB,
UBC
100
450
Types
Limit
|h
fe
|
f = 100 MHz V
CE
= 20 V dc,
I
C
= 20 mA dc
C
obo
100 kHz
≤
f
≤
1 MHz
V
CB
= 10 V dc, I
E
= 0
pF
Switching (saturated)
t
off
t
on
See figure 17
See figure 18
ns
ns
2N2906A,
2N2907A,
L, UA, UB, UBC
Min
Max
2.0
8
45
300
Types
Limits
V
CE(sat)1
(1)
I
C
= 150 mA dc
I
B
= 15 mA dc
V dc
V
CE(sat)2
(1)
I
C
= 500 mA dc
I
B
= 50 mA dc
V dc
1.6
V
BE(sat)1
(1)
I
C
= 150 mA dc
I
B
= 15 mA dc
V dc
0.6
1.3
V
BE(sat)2
(1)
I
C
= 500 mA dc
I
B
= 50 mA dc
V dc
2.6
2N2906A, 2N2907A,
L, UA, UB, UBC
Min
Max
0.4
(1) Pulsed see 4.5.1.
2
MIL-PRF-19500/291R
Symbol
Inches
Min
CD
CH
HD
LC
LD
LL
LU
L
1
L
2
P
Q
TL
TW
r
α
.028
.036
.250
.100
.178
.170
.209
Dimensions
Millimeters
Min
4.52
4.32
5.31
Max
4.95
5.33
5.84
Notes
Max
.195
.210
.230
.100 TP
.016
.500
.016
.021
.750
.019
.050
2.54 TP
0.41
12.70
0.41
0.53
19.05
0.48
1.27
6.35
2.54
6
7,8
7,8,13
7,8
7,8
7,8
.030
.048
.046
.010
45° TP
0.71
0.91
0.76
1.22
1.17
0.25
45° TP
5
3,4
3
10
6
NOTES:
1. Dimension are in inches.
2. Millimeters are given for general information only.
3. Beyond r (radius) maximum, TW shall be held for a minimum length of .011 inch (0.28 mm).
4. Dimension TL measured from maximum HD.
5. Body contour optional within zone defined by HD, CD, and Q.
6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall be
within .007 inch (0.18 mm) radius of true position (TP) at maximum material condition (MMC)
relative to tab at MMC.
7. Dimension LU applies between L
1
and L
2
. Dimension LD applies between L
2
and LL minimum.
Diameter is uncontrolled in L
1
and beyond LL minimum.
8. All three leads.
9. The collector shall be internally connected to the case.
10. Dimension r (radius) applies to both inside corners of tab.
11. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
12. Lead 1 = emitter, lead 2 = base, lead 3 = collector.
13. For L suffix devices, dimension LL = 1.5 inches (38.10 mm) min. and 1.75 inches (44.45 mm) max.
FIGURE 1. Physical dimensions (similar to TO-18).
3
MIL-PRF-19500/291R
UA
Symbol
BL
BL2
BW
BW2
CH
L3
LH
LL1
LL2
LS
LW
LW2
Pin no.
Transistor
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.215
.225
5.46
5.71
.225
5.71
.145
.155
3.68
3.93
.155
3.93
.061
.075
1.55
1.90
.003
.007
0.08
0.18
.029
.042
0.74
1.07
.032
.048
0.81
1.22
.072
.088
1.83
2.23
.045
.055
1.14
1.39
.022
.028
0.56
0.71
.006
.022
0.15
0.56
1
Collector
2
Emitter
3
Base
Note
3
5
5
4
N/C
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension "CH" controls the overall package thickness. When a window lid is used, dimension "CH" must
increase by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
4. The corner shape (square, notch, radius) may vary at the manufacturer's option, from that shown on the
drawing.
5. Dimensions " LW2" minimum and "L3" minimum and the appropriate castellation length define an
unobstructed three-dimensional space traversing all of the ceramic layers in which a castellation was
designed. (Castellations are required on bottom two layers, optional on top ceramic layer.) Dimension "
LW2" maximum and "L3" maximum define the maximum width and depth of the castellation at any point on its
surface. Measurement of these dimensions may be made prior to solder dipping.
6. The coplanarity deviation of all terminal contact points, as defined by the device seating plane, shall not
exceed .006 inch (0.15mm) for solder dipped leadless chip carriers.
7. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 2. Physical dimensions, surface mount (UA version).
4
MIL-PRF-19500/291R
UB
Symbol
Inches
Min
.046
.115
.085
Dimensions
Millimeters
Min
1.17
2.92
2.16
Max
1.42
3.25
2.74
3.25
2.74
0.96
0.89
Note
Symbol
Inches
Min
.036
.071
.016
Dimensions
Millimeters
Max
.040
.079
.024
.008
.012
.022
Min
0.91
1.81
0.41
Max
1.02
2.01
0.61
.203
.305
.559
Note
BH
BL
BW
CL
CW
LL1
LL2
.022
.017
Max
.056
.128
.108
.128
.108
.038
.035
0.56
0.43
LS
1
LS
2
LW
r
r1
r2
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Pad 4 = Shielding connected to the lid.
4. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
FIGURE 3. Physical dimensions, surface mount (UB version).
5
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