TC74VHCV573FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHCV573FT,TC74VHCV573FK
Octal Schmitt D-Type Latch with 3-State Output
The TC74VHCV573 is an advanced high speed CMOS OCTAL
LATCH with 3-STATE OUTPUT fabricated with silicon gate
C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type latch is controlled by a latch enable input (LE)
and an output enable input (
OE
).
When the
OE
input is high, the eight outputs are in a high
impedance state.
Input pin have hysteresis between the positive-going and
negative-going thresholds. Thus the TC74VHCV573 is capable of
squaring up transitions of slowly changing input signals and
provides an improved noise immunity.
Input protection and output circuit ensure that 0 to 5.5 V can be
applied to the input and output
(Note)
pins without regard to the
supply voltage. These structure prevents device destruction due
to mismatched supply and input/output voltages such as battery
back up, etc.
Note:
Output in off-state.
TC74VHCV573FT
TC74VHCV573FK
Features
•
•
•
•
•
•
•
High speed: t
pd
=
5.0 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
2
μA
(max) at Ta
=
25°C
Wide operating voltage range: V
CC (opr)
=
1.8 V to 5.5 V
Ouput current: |I
OH
|/I
OL
=
16 mA (min) (V
CC
=
4.5 V)
Available in TSSOP and VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 573 type
Weight
TSSOP20-P-0044-0.65A
VSSOP20-P-0030-0.50
: 0.08 g ( typ.)
: 0.03 g ( typ.)
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2010-07-09
TC74VHCV573FT/FK
Pin Assignment
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
20
V
CC
19
18
17
16
15
14
13
12
11
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
LE
GND 10
(top view)
Truth Table
Inputs
OE
LE
X
L
H
H
D
X
X
L
H
Output
Z
Q
n
L
H
H
L
L
L
X: Don’t care
Z: High impedance
Q
n
: Q outputs are latched at the time when the LE input is taken to a low logic level.
System Diagram
D0
2
3
D1
4
D2
5
D3
6
D4
7
D5
D6
8
D7
9
D
11
LE
1
OE
19
Q0
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
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2010-07-09
TC74VHCV573FT/FK
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
Power dissipation
DC V
CC
/ground current
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
P
D
I
CC
/I
GND
T
stg
Rating
−0.5
to 7.0
−0.5
to 7.0
−
0.5 to 7.0
−
0.5 to V
CC
+
0.5
Unit
V
V
(Note 2)
(Note 3)
V
mA
(Note 4)
mA
mA
mW
mA
°C
−50
±
50
±
50
180
±
100
−65
to 150
Note1:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: Output in off-state
Note 3: High or low state. I
OUT
absolute maximum rating must be observed.
Note 4: V
OUT
<
GND, V
OUT
>
V
CC
Operating Ranges (Note 1)
Characteristics
Power supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dv
Rating
1.8 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
−
40 to 85
Unit
V
V
(Note 2)
(Note 3)
V
°C
ms/V
0 to 20(Vcc=3.3
±
0.3V)
0 to 1(Vcc=5
±
0.5V)
Note 1: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
Note 2: Output in off-state
Note 3: High or low state.
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2010-07-09
TC74VHCV573FT/FK
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
1.8
2.3
Positive threshold voltage
V
P
―
3.0
4.5
5.5
1.8
2.3
Negative threshold voltage
V
N
―
3.0
4.5
5.5
1.8
2.3
Hysteresis voltage
V
H
―
3.0
4.5
5.5
1.8
I
OH
=
−50 μA
V
IN
= V
IH
or
V
IL
I
OH
=
−8
mA
I
OH
=
−16
mA
3.0
4.5
3.0
4.5
1.8
I
OL
= 50
μA
V
IN
= V
IH
or
V
IL
I
OL
= 8 mA
I
OL
= 16 mA
3-state output off-state
current
Power-off leakage current
Input leakage current
Quiescent supply current
I
OZ
I
OFF
I
IN
I
CC
V
IN
= V
IH
or V
IL
V
OUT
= 0 to 5.5V
V
IN
/V
OUT
=
5.5 V
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
3.0
4.5
3.0
4.5
1.8 to
5.5
0
0 to
5.5
5.5
Min
―
―
―
―
―
0.15
0.45
0.90
1.35
1.65
0.15
0.20
0.30
0.40
0.50
1.7
2.9
4.4
2.58
3.94
―
―
―
―
―
―
―
―
―
Ta = 25°C
Typ.
―
―
―
―
―
―
―
―
―
―
―
―
―
―
―
1.8
3.0
4.5
―
―
0.0
0.0
0.0
―
―
―
―
―
―
Max
1.65
1.85
2.20
3.15
3.85
―
―
―
―
―
1.05
1.10
1.20
1.40
1.60
―
―
―
―
―
0.1
0.1
0.1
0.36
0.44
±0.5
0.5
±0.1
2.0
Ta =
−40
to 85°C
Min
―
―
―
―
―
0.15
0.45
0.90
1.35
1.65
0.15
0.20
0.30
0.40
0.50
1.7
2.9
4.4
2.48
3.80
―
―
―
―
―
―
―
―
―
Max
1.65
1.85
2.20
3.15
3.85
―
―
―
―
―
1.05
1.10
1.20
1.40
1.60
―
―
―
―
―
0.1
0.1
0.1
0.44
0.55
±5.0
5.0
±1.0
20.0
μA
μA
μA
μA
V
V
V
Unit
High-level output voltage
V
OH
Low-level output voltage
V
OL
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2010-07-09
TC74VHCV573FT/FK
Timing Requirements
(input: t
r
= t
f
= 3 ns)
Characteristics
Symbol
Test Condition
V
CC
(V)
Minimum pulse width
(LE)
2.5 ± 0.2
t
w (H)
―
3.3 ± 0.3
5.0 ± 0.5
2.5 ± 0.2
Minimum set-up time
t
s
―
3.3 ± 0.3
5.0 ± 0.5
2.5 ± 0.2
Minimum hold time
t
h
―
3.3 ± 0.3
5.0 ± 0.5
Ta = 25°C
Typ.
―
―
―
―
―
―
―
―
―
Limit
6.5
5.0
5.0
5.0
3.5
3.5
2.0
1.5
1.5
Ta =
−40
to
85°C
Limit
6.5
5.0
5.0
5.0
3.5
3.5
2.0
1.5
1.5
ns
ns
ns
Unit
5
2010-07-09
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