STM32H745BGT6 datasheet, PDF - EEWORLD Datasheet

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STM32H745BGT6: DescriptionHigh-performance and DSP with DP-FPU, Arm Cortex-M7 + Cortex-M4 MCU with 1MBytes of Flash memory, 1MB RAM, 480 MHz CPU, Art Accelerator, L1 cache, external memory interface, large set of peripherals, SMPS; CategoryThe embedded processor and controller Microcontrollers and processors; File Size3MB，252 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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STM32H745BGT6 Overview

High-performance and DSP with DP-FPU, Arm Cortex-M7 + Cortex-M4 MCU with 1MBytes of Flash memory, 1MB RAM, 480 MHz CPU, Art Accelerator, L1 cache, external memory interface, large set of peripherals, SMPS

STM32H745BGT6 Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Reach Compliance Code	compliant
Factory Lead Time	14 weeks
Samacsys Description	High-performance and DSP with DP-FPU, Arm Cortex-M7 + Cortex-M4 MCU with 1MBytes of Flash memory, 1MB RAM, 480 MHz CPU, Art Accelerator, L1 cache, external memory interface, large set of peripherals, SMPS
Has ADC	YES
Address bus width	26
bit size	32
maximum clock frequency	48 MHz
DMA channel	YES
External data bus width	32
length	28 mm
Number of I/O lines	150
Number of terminals	208
PWM channel	YES
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
speed	480 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	1.62 V
Nominal supply voltage	3.3 V
surface mount	YES
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	28 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER RISC

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STM32H745xI/G

Dual 32-bit Arm

Cortex

-M7 up to 480MHz and -M4 MCUs,

up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS

Datasheet

production data

Features

Dual core

•

32-bit

core with double-

precision FPU and L1 cache: 16 Kbytes of data

and 16 Kbytes of instruction cache; frequency

up to 480 MHz, MPU, 1027 DMIPS/

2.14 DMIPS/MHz (Dhrystone 2.1), and DSP

instructions

•

32-bit Arm

32-bit Cortex

-M4 core with FPU,

Adaptive real-time accelerator (ART

Accelerator™) for internal Flash memory and

external memories, frequency up to 240 MHz,

MPU, 300 DMIPS/1.25 DMIPS /MHz

(Dhrystone 2.1), and DSP instructions

Arm

Cortex

-M7

LQFP144

(20x20 mm)

LQFP176

(24x24 mm)

LQFP208

(28x28 mm)

FBGA

TFBGA240+25

(14x14 mm)

UFBGA176+25

(10x10 mm)

Reset and power management

•

3 separate power domains which can be

independently clock-gated or switched off:

– D1: high-performance capabilities

– D2: communication peripherals and timers

– D3: reset/clock control/power management

•

1.62 to 3.6 V application supply and I/Os

•

POR, PDR, PVD and BOR

•

Dedicated USB power embedding a 3.3 V

internal regulator to supply the internal PHYs

•

Embedded regulator (LDO) to supply the digital

circuitry

•

High power-efficiency SMPS step-down

converter regulator to directly supply V

CORE

and/or external circuitry

•

Voltage scaling in Run and Stop mode (6

configurable ranges)

•

Backup regulator (~0.9 V)

•

Voltage reference for analog peripheral/V

REF+

•

1.2 to 3.6 V V

BAT

supply

•

Low-power modes: Sleep, Stop, Standby and

BAT

supporting battery charging

Memories

•

Up to 2 Mbytes of Flash memory with read-

while-write support

•

1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc.

64 Kbytes of ITCM RAM + 128 Kbytes of

DTCM RAM for time critical routines),

864 Kbytes of user SRAM, and 4 Kbytes of

SRAM in Backup domain

•

Dual mode Quad-SPI memory interface

running up to 133 MHz

•

Flexible external memory controller with up to

32-bit data bus: SRAM, PSRAM,

SDRAM/LPSDR SDRAM, NOR/NAND Flash

memory clocked up to 125 MHz in

Synchronous mode

•

CRC calculation unit

Security

•

ROP, PC-ROP, active tamper

Low-power consumption

•

BAT

battery operating mode with charging

capability

•

CPU and domain power state monitoring pins

•

2.95 µA in Standby mode (Backup SRAM OFF,

RTC/LSE ON)

General-purpose input/outputs

•

Up to 168 I/O ports with interrupt capability

May 2019

This is information on a product in full production.

DS12923 Rev 1

1/252

www.st.com

STM32H745xI/G

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1

Dual Arm

Cortex

cores . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1.1

3.1.2

Arm

Cortex

-M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Arm

Cortex

-M4 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.2

3.3

Memory protection unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.3.1

3.3.2

3.3.3

Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

ART™ accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.4

3.5

Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.5.1

3.5.2

3.5.3

3.5.4

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Voltage regulator (SMPS step-down converter and LDO) . . . . . . . . . . . 28

SMPS step-down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3.6

3.7

Low-power strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Reset and clock controller (RCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.7.1

3.7.2

Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

System reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.8

3.9

3.10

3.11

3.12

3.13

3.14

3.15

3.16

General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Bus-interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

DMA controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 34

Extended interrupt and event controller (EXTI) . . . . . . . . . . . . . . . . . . . . 34

Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 34

Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 35

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Contents

STM32H745xI/G

3.17

3.18

3.19

3.20

3.21

3.22

3.23

3.24

3.25

3.26

3.27

3.28

Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

BAT

operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Digital-to-analog converters (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Ultra-low-power comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Operational amplifiers (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Digital filter for sigma-delta modulators (DFSDM) . . . . . . . . . . . . . . . . . . 38

Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

JPEG Codec (JPEG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.28.1

3.28.2

3.28.3

3.28.4

3.28.5

3.28.6

3.28.7

3.28.8

High-resolution timer (HRTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 43

General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Low-power timers (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5) . . . . 44

Independent watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Window watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

3.29

3.30

3.31

3.32

3.33

3.34

3.35

3.36

3.37

3.38

3.39

3.40

3.41

Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 45

Inter-integrated circuit interface (I

C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Universal synchronous/asynchronous receiver transmitter (USART) . . . 46

Low-power universal asynchronous receiver transmitter (LPUART) . . . . 47

Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 48

Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

SPDIFRX Receiver Interface (SPDIFRX) . . . . . . . . . . . . . . . . . . . . . . . . . 49

Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 49

Management Data Input/Output (MDIO) slaves . . . . . . . . . . . . . . . . . . . . 50

SD/SDIO/MMC card host interfaces (SDMMC) . . . . . . . . . . . . . . . . . . . . 50

Controller area network (FDCAN1, FDCAN2) . . . . . . . . . . . . . . . . . . . . . 50

Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 51

Ethernet MAC interface with dedicated DMA controller (ETH) . . . . . . . . . 51

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DS12923 Rev 1

STM32H745xI/G

Contents

3.42

3.43

High-definition multimedia interface (HDMI)

- consumer electronics control (CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Debug infrastructure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

6.1

Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

6.1.1

6.1.2

6.1.3

6.1.4

6.1.5

6.1.6

6.1.7

Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 107

6.2

6.3

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

6.3.1

6.3.2

6.3.3

6.3.4

6.3.5

6.3.6

6.3.7

6.3.8

6.3.9

6.3.10

6.3.11

6.3.12

6.3.13

6.3.14

6.3.15

6.3.16

6.3.17

6.3.18

General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

VCAP external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

SMPS step-down converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . 114

Embedded reset and power control block characteristics . . . . . . . . . . 115

Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 137

External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 142

PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 150

I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159

FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159

DS12923 Rev 1

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STM32H745BGT6 Related Products

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