3A, Rad Hard, Positive, Ultra Low Dropout Regulator
ISL75051SRH
The ISL75051SRH is a radiation hardened low-voltage,
high-current, single-output LDO specified for up to 3.0A of
continuous output current. These devices operate over an input
voltage range of 2.2V to 6.0V and are capable of providing
output voltages of 0.8V to 5.0V adjustable based on resistor
divider setting. Dropout voltages as low as 65mV can be
realized using the device.
The OCP pin allows the short circuit output current limit
threshold to be programmed by means of a resistor from the
OCP pin to GND. The OCP setting range is from 0.5A minimum
to 8.5A maximum. The resistor sets the constant current
threshold for the output under fault conditions. The thermal
shutdown disables the output if the device temperature
exceeds the specified value. It subsequently enters an ON/OFF
cycle until the fault is removed. The ENABLE feature allows the
part to be placed into a low current shutdown mode that
typically draws about 1
µ
A. When enabled, the device operates
with a typical low ground current of 11mA, which provides for
operation with low quiescent power consumption.
The device is optimized for fast transient response and single
event effects. This reduces the magnitude of SET seen on the
output. Additional protection diodes and filters are not needed.
The device is stable with tantalum capacitors as low as 47µF
and provides excellent regulation all the way from no load to
full load. Programmable soft-start allows the user to program
the inrush current by means of the decoupling capacitor value
used on the BYP pin.
Features
•
DLA SMD#5962-11212
• Output Current Up to 3.0A at T
J
= 150°C
• Output Accuracy ±1.5% over MIL Temp Range
• Ultra Low Dropout:
- 65mV Typ Dropout at 1.0A
- 225mV Typ Dropout at 3.0A
• Noise of 100µV
RMS
from 300Hz to 300kHz
• SET Mitigation with No Added Filtering/Diodes
• Input Supply Range: 2.2V to 6.0V
• Fast Load Transient Response
• Shutdown Current of 1µA Typ
• Output Adjustable Using External Resistors
• PSRR 66dB Typ @ 1kHz
• Enable and PGood Feature
• Programmable Soft-start/Inrush Current Limiting
• Adjustable Overcurrent Limit from 0.5A to 8.5A
• Over-temperature Shutdown
• Stable with 47µF Min Tantalum Capacitor
• 18 Ld Ceramic Flatpack Package
• Radiation Environment
- High Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 krad(Si)
- SET/SEL/SEB . . . . . . . . . . . . . . . . . . . . . . . .86 MeV
•
cm
2
/mg
Applications
• LDO Regulator for Space Application
• DSP, FPGA and µP Core Power Supplies
• Post-regulation of Switched Mode Power Supplies
• Down-hole Drilling
EN
0.30
OCP
ADJ
ISL75051SRH
VIN
PG
220uF
0.1uF
VIN
2.67k
VOUT
GND
R1
0.1uF
220uF
0.1uF
VOUT
DROPOUT VOLTAGE (V)
ROCP
VIN
EN
BYP
0.25
0.20
0.15
0.10
0.05
0.00
0.00
+150°C
+125°C
+25°C
4.7n
PG
R2
100pF
0.50
1.00
1.50
2.00
2.50
3.00
3.50
I
OUT
(A)
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. DROPOUT vs I
OUT
November 4, 2011
FN7610.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL75051SRH
Block Diagram
VIN
CURRENT
LIMIT ADJ
520MV
BYPASS
REFERENCE
BIAS
CURRENT
LIMIT
THERMAL
SHUTDOWN
POWER
PMOS
OCP
VOUT
ENABLE
LEVEL
SHIFT
ADJ
VADJ
PGOOD
DELAY
450mV
GND
Typical Applications
EN
EN
511
OCP
VIN
VIN
VIN
VIN
VIN
VIN
VIN
PG
220uF
0.1uF
4.32k
2.67k
17
18
2
1
VOUT
GND
0.1uF
220uF
11
12
13
8
7
6
ADJ
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
0.2uF
10
9
BYP
14
5
ISL75051SRH
15
16
4
3
4.7n
VIN
2.26k
5.49k
100pF
PG
2
FN7610.1
November 4, 2011
ISL75051SRH
Pin Configuration
ISL75051SRH
(18LD CDFP)
TOP VIEW
GND
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VADJ
BYP
1
2
3
4
5
6
7
8
9
GND
18
17
16
15
14
13
12
11
10
PG
VIN
VIN
VIN
VIN
VIN
VIN
OCP
EN
Pin Descriptions
PIN NUMBER
12, 13, 14
15, 16, 17
18
1
2, 3, 4
5, 6, 7
8
9
10
11
Top Lid
PIN NAME
V
IN
PG
GND
V
OUT
VADJ
BYP
EN
OCP
GND
Input supply pins
V
OUT
in regulation signal. Logic low defines when V
OUT
is not in regulation. Must be grounded if not used.
GND pin
Output voltage pins
VADJ pin allows V
OUT
to be programmed with an external resistor divider.
To filter the internal reference, connect a 0.1µF capacitor from BYP pin to GND.
V
IN
independent chip enable. TTL and CMOS compatible.
Allows current limit to be programmed with an external resistor.
The top lid is connected to GND pin of the package.
DESCRIPTION
3
FN7610.1
November 4, 2011
ISL75051SRH
Ordering Information
ORDERING
NUMBER
5962R1121201VXC
5962R1121201QXC
5962R1121201V9A
ISL75051SRHX/SAMPLE
ISL75051SRHF/PROTO
ISL75051SRHEVAL1Z
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. For Moisture Sensitivity Level (MSL), please see device information page for
ISL75051SRH.
For more information on MSL please see
Tech Brief
TB363.
PART NUMBER
(NOTES 1, 2)
ISL75051SRHVF
ISL75051SRHQF
ISL75051SRHVX
ISL75051SRHX/SAMPLE
ISL75051SRHF/PROTO
Evaluation Board
TEMP
RANGE (°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
PACKAGE
18 Ld CDFP
18 Ld CDFP
Die
Die Sample
18 Ld CDFP
K18.D
PKG DWG. #
K18.D
K18.D
4
FN7610.1
November 4, 2011
ISL75051SRH
Absolute Maximum Ratings
V
IN
Relative to GND (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.7V
V
OUT
Relative to GND (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.7V
PG, EN, OCP/ADJ Relative to GND (Note 3). . . . . . . . . . . . . -0.3 to +6.7VDC
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
18 Ld CDFP Package (Notes 5, 6) . . . . . . .
28
4
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
(Note 4)
Ambient Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Junction Temperature (T
J
) (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
V
IN
Relative to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2V to 6.0V
V
OUT
Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.8V to 5.0V
PG, EN, OCP/ADJ relative to GND . . . . . . . . . . . . . . . . . . . . . . . 0V to +6.0V
Radiation Information
Max Total Dose
(Dose Rate = 50 - 300radSi/s . . . . . . . . . . . . . . . . . . . . . . . 100 krad (Si)
SET (V
OUT
< ±5% During Events (Note 7). . . . . . . . . . . . . . 86MeV
•
cm
2
/mg
SEL/B (No Latchup/Burnout . . . . . . . . . . . . . . . . . . . . . . . . 86MeV
•
cm
2
/mg
The output capacitance used for SEE testing is 220µF for C
IN
and C
OUT
,
200nF for BYPASS
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. Extended operation at these conditions may compromise reliability. Exceeding these limits will result in damage. Recommended operating conditions
define limits where specifications are guaranteed.
4. Refer to “Thermal Guidelines” on page 12.
5.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379
6. For
θ
JC
, the “case temp” location is the center of the package underside.
7. The device can work down to V
OUT
= 0.8V; however, the SET performance of < ±5% at LET = 86MeV.cm
2
/mg is guaranteed at V
OUT
= >1.5V only. SET
tests performed with 220µF 10V 25mΩ and 0.1µF CDR04 capacitor on the input and output.
Unless otherwise noted, all parameters are guaranteed over the following specified conditions:
V
IN
= V
OUT
+ 0.4V, V
OUT
= 1.8V, C
IN
= C
OUT
= 220µF 25mΩ and 0.1µF X7R, T
J
= +25°C, I
L
= 0A. Applications must follow thermal guidelines of
the package to determine worst-case junction temperature. Please refer to “Applications Information” on page 11 of the datasheet and
Tech Brief
TB379.
Boldface limits apply over the operating temperature range, -55°C to +125°C. Pulse load techniques used by ATE to ensure
T
J
= T
A
defines guaranteed limits.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8)
UNITS
Electrical Specifications
DC CHARACTERISTICS
DC Output Voltage Accuracy
V
OUT
V
OUT
Resistor adjust to 0.52V, 1.5V and 1.8V
2.2V < V
IN
< 3.6V; 0A < I
LOAD
< 3.0A
V
OUT
Resistor adjust to 5.0V
V
OUT
+ 0.4V < V
IN
< 6.0V; 0A < I
LOAD
< 3.0A
Feedback Pin
BYP Pin
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Input Line Regulation
DC Output Load Regulation
DC Output Load Regulation
DC Output Load Regulation
V
ADJ
V
BYP
2.2V < V
IN
< 6.0V; I
LOAD
= 0A
2.2V < V
IN
< 6.0V; I
LOAD
= 0A
2.2V < V
IN
< 3.6V, V
OUT
= 1.5V, +25°C & -55°C
(Note 9)
2.2V < V
IN
< 3.6V, V
OUT
= 1.5V, +125°C (Note 9)
2.2V < V
IN
< 3.6V, V
OUT
= 1.8V, +25°C & -55°C
(Note 9)
2.2V < V
IN
< 3.6V, V
OUT
= 1.8V, +125°C (Note 9)
V
OUT
+ 0.4V < V
IN
< 6.0V, V
OUT
= 5.0V (Note 9)
V
OUT
= 1.5V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 9)
V
OUT
= 1.8V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 9)
V
OUT
= 5.0V; 0A < I
LOAD
< 3.0A, V
IN
= V
OUT
+ 0.4V
(Note 9)
-4.0
-4.0
-15.0
-1.5
514.8
0.2
520
520
1.13
1.13
1.62
1.62
12.50
-0.8
-1.2
-6.0
3.5
8.0
3.5
10.5
20.0
-0.1
-0.05
-0.05
1.5
525.2
%
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
-1.5
0.2
1.5
%
5
FN7610.1
November 4, 2011
京公网安备 11010802033920号
EEWORLD
