SST34WA32A4-70-5E-MVNE datasheet, PDF

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SST34WA32A4-70-5E-MVNE: DescriptionMemory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56; Categorystorage storage; File Size2MB，76 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SST34WA32A4-70-5E-MVNE Overview

Memory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56

SST34WA32A4-70-5E-MVNE Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Parts packaging code	BGA
package instruction	VFBGA,
Contacts	56
Reach Compliance Code	unknown
JESD-30 code	R-PBGA-B56
length	8 mm
memory density	33554432 bit
Memory IC Type	MEMORY CIRCUIT
memory width	16
Number of functions	1
Number of terminals	56
word count	2097152 words
character code	2000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-20 °C
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	1.95 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	6 mm

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32 Mbit Burst Mode Concurrent SuperFlash ComboMemory

SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284

Advance Information

FEATURES:

• Flash Organization:

– 2M x 16

• PSRAM Organization:

– 8 Mbit: 512k X 16

– 16 Mbit: 1M x 16

• Single Voltage Read and Write Operations

–

= 1.7V - 1.95V for Program, Erase and Read

• Top or Bottom Boot Block Protection

– Bottom Boot Protection - SST34WA32x3

– Top Boot Protection - SST34WA32x4

• Multiplexed Data/Address for reduced I/O count

– A

–A

multiplexed as DQ

–DQ

– Addresses are latched by AVD# control input when

BEF# is low

• Low Power Consumption (Typical)

– Standby Current: 50 µA

• Flexible Flash Memory Organization

– 4 Banks (512 KW)

– 63 Uniform 32 KWord blocks

– Uniform Sectors (2KWord) for entire memory array

• Concurrent Flash Memory Operation

– Read While Program (RWP)

– Read While Erase (RWE)

• Erase-Suspend/Erase-Resume Capability

– Read while Erase-Suspend

– Program while Erase-Suspend

– Read while Program during Erase-Suspend

• Industry Standard CFI interface compatible

•

Flash Synchronous Burst Mode Read (54 MHz/66 MHz)

– Continuous, Sequential Linear Burst

– 8/16/32-words with Wrap-Around Burst

– 8/16/32-words without Wrap-Around Burst

– Burst Access Time: 13.5 ns/11.5 ns

– Asynchronous Random Address Access: 70 ns

PSRAM Burst Mode Read/Write Access (54 MHz/66 MHz)

– Continuous, Sequential Linear Burst

– 4/8/16-words with Wrap-Around Burst

– 4/8/16-words without Wrap-Around Burst

– Burst Access Time: 13.5 ns/11.5 ns

– Asynchronous Random Address Access: 70 ns

Fast Program and Erase (Typical)

– Word Program Time: 10 µs

– Sector/Block Erase Time: 15 ms

– Chip Erase Time: 30 ms

Expanded Block Locking

– All blocks locked at Power-up

– Any block can be locked/unlocked by software

Flash Security ID

– 128-bit unique ID – factory preset

– 128-word non-erasable, lockable User-programmed

ID bits (“OTP-like”)

End-of-Write Detection

– Data# Polling

– Toggle bit

Packages Available

– 56-ball VFBGA (6 x 8mm)

Superior Reliability

– Endurance per sector: 1,000,000 cycles (typical)

– Greater than 100 years Data Retention

All non-Pb (lead-free) devices are RoHS compliant

•

PRODUCT DESCRIPTION

The SST34WA32A3 / SST34WA32A4 / SST34WA3283 /

SST34WA3284 are 32 Mbit (2 Mbit x16) ComboMemory

devices which integrate a 32 Mbit flash with either a 16 Mbit

PSRAM or 8 Mbit PSRAM in a multi-chip package (MCP).

These devices utilize a single 1.8V supply and support

burst mode access and address / data multiplex

architecture.

The Combo Memory devices feature a 512 KWord uniform

multi-bank flash memory architecture that consists of four

banks that contain individually-erasable blocks and sectors

for increased flexibility. Either the top or bottom bank,

consists of 15 standard 32 KWord blocks and four

parameter 8 KWord blocks for added granularity. The

remaining three banks each contain uniform 32 KWord

blocks. Each 32 KWord block is further divided into sixteen

uniform 2 KWord sectors. Any bank can be read while

another bank is being erased or programmed, with zero

latency. In addition, these devices provide Erase-Suspend

mode during which data can be programmed to, or read

from, any sector or block that is not being erased.

S71358-01-000

11/07

SST34WA32A3/32A4/3283/3284 support synchronous

Burst mode Read from any address location of the flash

memory array; and Burst mode Read and Write from any

address location of the PSRAM. The Burst modes allow

the devices to Read or Write sequential data with

significantly shorter latency delays than during a random

read or write.

To protect against inadvertent write, the flash memory bank

offers an expanded Block Locking scheme. Each block can

be individually locked, and the top or bottom 8 KWord

parameter blocks of each boot block can be individually

locked for finer granularity. In addition, a 136-words Security

ID, included on the flash memory, increases system design

security.

Designed, manufactured, and tested for applications

requiring low power and small form factor the

SST34WA32A3/32A4/3283/3284 are offered in an

extended temperature with a small footprint package to

meet board space constraints requirement. See Figure 8

for pin assignments.

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

CSF and ComboMemory are trademarks of Silicon Storage Technology, Inc.

These specifications are subject to change without notice.

SST34WA32A4-70-5E-MVNE Related Products

	SST34WA32A4-70-5E-MVNE	SST34WA3283-70-5E-MVNE	SST34WA3284-70-5E-MVNE	SST34WA32A3-70-5E-MVNE
Description	Memory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56	Memory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56	Memory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56	Memory Circuit, 2MX16, CMOS, PBGA56, 6 X 8 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-225, VFBGA-56
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	BGA	BGA	BGA	BGA
package instruction	VFBGA,	VFBGA,	VFBGA,	VFBGA,
Contacts	56	56	56	56
Reach Compliance Code	unknown	unknown	unknown	unknown
JESD-30 code	R-PBGA-B56	R-PBGA-B56	R-PBGA-B56	R-PBGA-B56
length	8 mm	8 mm	8 mm	8 mm
memory density	33554432 bit	33554432 bit	33554432 bit	33554432 bit
Memory IC Type	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT	MEMORY CIRCUIT
memory width	16	16	16	16
Number of functions	1	1	1	1
Number of terminals	56	56	56	56
word count	2097152 words	2097152 words	2097152 words	2097152 words
character code	2000000	2000000	2000000	2000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-20 °C	-20 °C	-20 °C	-20 °C
organize	2MX16	2MX16	2MX16	2MX16
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	VFBGA	VFBGA	VFBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm	1 mm	1 mm
Maximum supply voltage (Vsup)	1.95 V	1.95 V	1.95 V	1.95 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER
Terminal form	BALL	BALL	BALL	BALL
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	40	40	40	40
width	6 mm	6 mm	6 mm	6 mm

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