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CD4515BDMSR

Description
4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP24, BRAZE SEALED, DIP-24
Categorylogic    logic   
File Size94KB,9 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

CD4515BDMSR Overview

4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP24, BRAZE SEALED, DIP-24

CD4515BDMSR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Parts packaging codeDIP
package instructionDIP, DIP24,.6
Contacts24
Reach Compliance Codenot_compliant
ECCN codeEAR99
series4000/14000/40000
Input adjustmentLATCHED
JESD-30 codeR-CDIP-T24
JESD-609 codee0
Load capacitance (CL)50 pF
Logic integrated circuit typeOTHER DECODER/DRIVER
MaximumI(ol)0.00036 A
Number of functions1
Number of terminals24
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityINVERTED
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.6
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5/15 V
Prop。Delay @ Nom-Sup1310 ns
propagation delay (tpd)1310 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height5.72 mm
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose100k Rad(Si) V
width15.24 mm
CD4514BMS
CD4515BMS
December 1992
CMOS 4-Bit
Latch/4-to-16 Line Decoders
Pinout
CD4514BMS, CD4515BMS
TOP VIEW
STROBE 1
DATA 1 2
DATA 2 3
S7 4
S6 5
S5 6
S4 7
S3 8
S2 9
S1 10
S0 11
VSS 12
24 VDD
23 INHIBIT
22 DATA 4
21 DATA 3
20 S10
19 S11
18 S8
17 S9
16 S14
15 S15
14 S12
13 S13
Features
• High-Voltage Types (20-Volt Rating)
• CD4514BMS Output “High” on Select
• CD4515BMS Output “Low” on Select
• Strobed Input Latch
• Inhibit Control
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and 25
o
C
• Noise Margin (Full Package-Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V, and 15V Parametric Ratings
• Standardized, Symmetrical Output Characteristics
• Meets all Requirements of JEDEC Tentative Standard
No. 13B, "Standard Specifications for Description of
‘B’ Series CMOS Devices"
Functional Diagram
VDD = 24
VSS = 12
Applications
• Digital Multiplexing
• Address Decoding
• Hexadecimal/BCD Decoding
• Program-counter Decoding
• Control Decoder
DATA 1
DATA 2
DATA 3
DATA 4
STROBE
2
3
21
22
1
LATCH
A
B
C
D
4 TO 16
DECODER
Description
CD4514BMS and CD4515BMS consist of a 4-bit strobed
latch and a 4-to-16-line decoder. The latches hold the last
input data presented prior to the strobe transition from 1 to 0.
Inhibit control allows all outputs to be placed at
0(CD4514BMS) or 1(CD4515BMS) regardless of the state of
the data or strobe inputs.
The decode truth table indicates all combinations of data
inputs and appropriate selected outputs.
These devices are similar to industry types MC14514 and
MC14515.
The CD4514BMS and CD4515BMS are supplied in these 24
lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4V
H1Z
H4P
11
9
10
8
7
6
5
4
18
17
20
19
14
13
16
15
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
INHIBIT
23
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
3195
7-1188

CD4515BDMSR Related Products

CD4515BDMSR CD4515BKMSR CD4514BFMSR CD4515BFMSR
Description 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP24, BRAZE SEALED, DIP-24 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP24 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, CDIP24, FRIT SEALED, DIP-24 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP24, FRIT SEALED, DIP-24
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DIP DFP DIP DIP
package instruction DIP, DIP24,.6 DFP, FL24,.4 DIP, DIP24,.6 DIP, DIP24,.6
Contacts 24 24 24 24
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99 EAR99
series 4000/14000/40000 4000/14000/40000 4000/14000/40000 4000/14000/40000
Input adjustment LATCHED LATCHED LATCHED LATCHED
JESD-30 code R-CDIP-T24 R-CDFP-F24 R-GDIP-T24 R-GDIP-T24
JESD-609 code e0 e0 e0 e0
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER OTHER DECODER/DRIVER
MaximumI(ol) 0.00036 A 0.00036 A 0.00036 A 0.00036 A
Number of functions 1 1 1 1
Number of terminals 24 24 24 24
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
Output polarity INVERTED INVERTED TRUE INVERTED
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
encapsulated code DIP DFP DIP DIP
Encapsulate equivalent code DIP24,.6 FL24,.4 DIP24,.6 DIP24,.6
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE FLATPACK IN-LINE IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
power supply 5/15 V 5/15 V 5/15 V 5/15 V
Prop。Delay @ Nom-Sup 1310 ns 1310 ns 1310 ns 1310 ns
propagation delay (tpd) 1310 ns 1310 ns 1310 ns 1310 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V
Maximum seat height 5.72 mm 2.92 mm 5.72 mm 5.72 mm
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount NO YES NO NO
technology CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE FLAT THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 1.27 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
total dose 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V 100k Rad(Si) V
width 15.24 mm 9.905 mm 15.24 mm 15.24 mm
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