UNISONIC TECHNOLOGIES CO., LTD
U74LVC2G125
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
DESCRIPTION
The U74LVC2G125L consists of two bus buffers with 3-state
output controlled by enable input (nOE), when nOE is high, the
output is disable.
Inputs can be driven from either 3.3V or 5V devices, so the
device can be used in a mix 3.3V/5V system.
This device is full specified for partial power-down protective
circuit, preventing the backflow current through the device when it
is powered down.
CMOS IC
MSOP-8
TSSOP-8
FEATURES
* Operation Voltage Range: 1.65~5.5V
* Low Power Dissipation
* Input Accept Voltage to 5.5V
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
U74LVC2G125L-P08-R
U74LVC2G125G-P08-R
U74LVC2G125L-P08-T
U74LVC2G125G-P08-T
U74LVC2G125L-SM1-R
U74LVC2G125G-SM1-R
U74LVC2G125L-SM1-T
U74LVC2G125G-SM1-T
Package
TSSOP-8
TSSOP-8
MSOP-8
MSOP-8
Packing
Tape Reel
Tube
Tape Reel
Tube
MARKING INFORMATION
MSOP-8
TSSOP-8
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Copyright © 2012 Unisonic Technologies Co., Ltd
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QW-R502-136.C
U74LVC2G125
PIN CONFIGURATION
1OE 1
1A
2Y
GND
2
3
4
8
7
6
5
V
CC
2OE
1Y
2A
CMOS IC
FUNCTION TABLE
(each gate)
INPUT
nOE
L
L
H
A
L
H
X
OUTPUT
Y
L
H
Z
LOGIC DIAGRAM
(positive logic)
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U74LVC2G125
ABSOLUTE MAXIMUM RATING
(unless otherwise specified)(Note 1)
PARAMETER
CMOS IC
SYMBOL
RATINGS
UNIT
Supply Voltage
V
CC
-0.5~6.5
V
Input Voltage
V
IN
-0.5~6.5
V
-0.5~V
CC
+0.5
V
Enable mode
V
OUT
Output Voltage
Disable mode
V
OUT
-0.5~6.5
V
Power-down mode
V
OUT
-0.5~6.5
V
Input Clamp Current(V
iN
<0)
I
IK
-50
mA
Output Clamp Current(V
OUT
<0)
I
OK
-50
mA
Output Current
I
OUT
±50
mA
V
CC
or GND Current
I
CC
±100
mA
Power Dissipation
P
D
500
mW
Storage Temperature
T
STG
-65 ~ +150
°C
Note 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Input Voltage
Output Voltage
Input Transition Rise or Fall Rate
Operating Temperature
SYMBOL
TEST CONDITIONS
V
CC
Operating
V
IN
V
CC
=1.65V~5.5V; Enable mode
V
OUT
V
CC
=1.65V~5.5V; Disable mode
V
CC
=0V; Power-down mode
V
CC
=1.65~2.7V
t
R
, t
F
V
CC
=2.7~5.5V
T
A
MIN
1.65
0
0
0
0
0
0
-40
TYP
MAX
5.5
5.5
V
CC
5.5
5.5
20
10
85
UNIT
V
V
V
V
V
ns/V
ns/V
°C
STATIC CHARACTERISTICS
(T
A
=25°C)
PARAMETER
High-Level Input Voltage
SYMBOL
V
IH
TEST CONDITIONS
V
CC
= 1.65V ~ 1.95V
V
CC
= 2.3V ~ 2.7V
V
CC
= 2.7V ~ 3.6V
V
CC
= 4.5V ~ 5.5V
V
CC
= 1.65V~1.95V
V
CC
= 2.3V ~ 2.7V
V
CC
= 2.7V ~ 3.6V
V
CC
= 4.5V ~5.5V
V
CC
= 1.65V ~ 5.5V, I
OH
=-100μA
V
CC
= 1.65V, I
OH
=-4mA
V
CC
= 2.3V, I
OH
=-8mA
V
CC
= 2.7V, I
OH
=-12mA
V
CC
= 3V, I
OH
=-24mA
V
CC
= 4.5V, I
OH
=-32mA
V
CC
= 1.65V ~ 5.5V, I
OL
=100μA
V
CC
= 1.65V, I
OL
=4mA
V
CC
= 2.3V, I
OL
=8mA
V
CC
= 2.7V, I
OL
=12mA
V
CC
= 3V, I
OL
=24mA
V
CC
= 4.5V, I
OL
=32mA
MIN
0.65×V
CC
TYP
MAX
1.7
2
0.7×V
CC
0.35×V
CC
Low-Level Input Voltage
V
IL
0.7
0.8
0.3×V
CC
V
CC
－0.1
High-Level Output Voltage
V
OH
1.2
1.9
2.2
2.3
3.8
0.1
0.45
0.3
0.4
0.55
0.55
Low-Level Output Voltage
V
OL
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
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QW-R502-136.C
U74LVC2G125
STATIC CHARACTERISTICS (Cont.)
PARAMETER
Input Leakage Current
Output OFF-State Current
Power OFF Leakage Current
Quiescent Supply Current
Additional Quiescent Supply
Current
Input Capacitance
SYMBOL
I
I(LEAK)
I
OZ
I
OFF(LEAK)
I
Q
Δ
I
Q
C
IN
TEST CONDITIONS
V
CC
= 5.5V, V
IN
=5.5V or GND
V
CC
= 3.6V, V
OUT
=V
CC
or GND
V
CC
= 0V, V
IN
or V
OUT
=5.5V
V
CC
= 5.5V, V
IN
=V
CC
or GND, I
OUT
=0
V
CC
= 2.3V ~ 5.5V, One input at
V
CC
-0.6V, other inputs at V
CC
or GND
V
IN
=V
CC
or GND
MIN
TYP
±0.1
±0.1
±0.1
0.1
5
2
CMOS IC
MAX
±5
±10
±10
10
500
UNIT
μA
μA
μA
μA
μA
pF
DYNAMIC CHARACTERISTICS
(T
A
=25℃)
PARAMETER
Propagation Delay From Input (A)
to Output(Y)
SYMBOL
TEST CONDITIONS
V
CC
=1.8V±0.15
V
CC
=2.5V±0.2
V
CC
=2.7V
V
CC
=3.3V±0.3
V
CC
=5V±0.5
V
CC
=1.8V±0.15
V
CC
=2.5V±0.2
V
CC
=2.7V
V
CC
=3.3V±0.3
V
CC
=5V±0.5
V
CC
=1.8V±0.15
V
CC
=2.5V±0.2
V
CC
=2.7V
V
CC
=3.3V±0.3
V
CC
=5V±0.5
MIN
1
0.5
1
0.5
0.5
1.5
1
1.5
0.5
0.5
1
0.5
1
1
0.5
TYP
3.7
2.5
2.7
2.3
1.9
4.3
2.8
3.3
2.4
2
3.5
1.8
2.7
2.7
1.8
MAX
9.1
4.8
4.8
4.3
3.7
9.9
5.6
5.7
4.7
3.8
11.6
5.8
4.8
4.6
3.4
UNIT
t
PLH
/t
PHL
ns
Propagation Delay From Input
(n
ΟΕ
) to Output(Y)
t
PZL
/t
PZH
ns
Propagation Delay From Input
(n
ΟΕ
) to Output(Y)
t
PLZ
/t
PHZ
ns
OPERATING CHARACTERISTICS
PARAMETER
Power Dissipation Capacitance
SYMBOL
Cpd
TEST CONDITIONS
Output Enable, f=10MHz
Output Disable, f=10MHz
MIN
TYP
18
5
MAX
UNIT
pF
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QW-R502-136.C
U74LVC2G125
TEST CIRCUIT AND WAVEFORMS
CMOS IC
Note: C
L
includes probe and jig capacitance.
V
CC
1.8V±0.15V
2.5V±0.2V
2.7V
3.3V±0.3V
5V±0.5V
V
IN
V
CC
V
CC
2.7V
2.7 V
V
CC
t
R
, t
F
≤2ns
≤2ns
≤2.5ns
≤2.5ns
≤2.5ns
V
M
V
CC
/2
V
CC
/2
1.5V
1.5V
V
CC
/2
V
EXT
2×V
CC
2×V
CC
6V
6V
2×V
CC
C
L
30pF
30pF
50pF
50pF
50pF
R
L
1KΩ
500Ω
500Ω
500Ω
500Ω
V
△
0.15V
0.15V
0.3V
0.3V
0.3V
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QW-R502-136.C
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