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BS616LV4017EIG55

Description
256K X 16 STANDARD SRAM, 70 ns, PDSO44
Categorystorage   
File Size239KB,11 Pages
ManufacturerBSI
Websitehttp://www.brilliancesemi.com/
Download Datasheet Parametric View All

BS616LV4017EIG55 Overview

256K X 16 STANDARD SRAM, 70 ns, PDSO44

BS616LV4017EIG55 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals44
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage2.7 V
Rated supply voltage3 V
maximum access time70 ns
Processing package descriptionGreen, TSOP-2-44
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRectangle
Package SizeSMALL OUTLINE, THIN PROFILE
surface mountYes
Terminal formGULL WING
Terminal spacing0.8000 mm
Terminal locationpair
Packaging MaterialsPlastic/Epoxy
Temperature levelCOMMERCIAL
memory width16
organize256K × 16
storage density4.19E6 deg
operating modeASYNCHRONOUS
Number of digits262144 words
Number of digits256K
Memory IC typeStandard memory
serial parallelparallel
Very Low Power CMOS SRAM
256K X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV4017
FEATURES
Wide V
CC
operation voltage : 2.4V ~ 5.5V
Very low power consumption :
Operation current : 27mA (Max.) at 55ns
V
CC
= 3.0V
2mA (Max.) at 1MHz
O
Standby current : 2/4uA (Max.) at 70/85 C
Operation current : 65mA (Max.) at 55ns
V
CC
= 5.0V
10mA (Max.) at 1MHz
O
Standby current : 10/20uA (Max.) at 70/85 C
High speed access time :
-55
55ns(Max.) at V
CC
=3.0~5.5V
-70
70ns(Max.) at V
CC
=2.7~5.5V
Automatic power down when chip is deselected
Easy expansion with CE and OE options
I/O Configuration x8/x16 selectable by LB and UB pin.
Three state outputs and TTL compatible
Fully static operation
Data retention supply voltage as low as 1.5V
DESCRIPTION
The BS616LV4017 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with maximum CMOS standby
current of 4/20uA at Vcc=3/5V at 85 C and maximum access time of
55/70ns.
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
The BS616LV4017 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV4017 is available in DICE form, JEDEC standard
44-pin TSOP II and 48-ball BGA package.
O
POWER CONSUMPTION
POWER DISSIPATION
PRODUCT
FAMILY
BS616LV4017DC
BS616LV4017AC
BS616LV4017EC
BS616LV4017AI
BS616LV4017EI
Industrial
O
-40 C to +85 C
O
OPERATING
TEMPERATURE
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=3.0V
10MHz
f
Max.
V
CC
=5.0V
V
CC
=3.0V
1MHz
V
CC
=5.0V
10MHz
f
Max.
1MHz
Commercial
O
O
+0 C to +70 C
DICE
10uA
2.0uA
9mA
39mA
63mA
1.5mA
14mA
26mA
BGA-48-0608
TSOP II-44
20uA
4.0uA
10mA
40mA
65mA
2mA
15mA
27mA
BGA-48-0608
TSOP II-44
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
A
B
C
D
E
F
G
H
LB
D8
D9
VSS
VCC
D14
D15
NC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
6
NC
D0
D2
VCC
VSS
D6
D7
NC
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
BLOCK DIAGRAM
BS616LV4017EC
BS616LV4017EI
A12
A11
A10
A9
A8
A5
A6
A7
A4
A3
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 4096
4096
DQ0
.
.
.
.
.
.
DQ15
16
.
.
.
.
.
.
16
Data
Output
Buffer
16
256
Column Decoder
8
Control
Address Input Buffer
Data
Input
Buffer
16
Column I/O
Write Driver
Sense Amp
2
OE
UB
D10
D11
D12
D13
NC
A8
3
A0
A3
A5
A17
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE
D1
D3
D4
D5
WE
A11
CE
WE
OE
UB
LB
V
CC
V
SS
A13 A14 A15 A16 A17 A0 A1 A2
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
R0201-BS616LV4017
1
Revision
1.4
Oct.
2008
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