TC55VZM208ATGN12 datasheet, PDF

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TC55VZM208ATGN12: DescriptionIC 512K X 8 CACHE SRAM, 12 ns, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44, Static RAM; Categorystorage storage; File Size161KB，10 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC55VZM208ATGN12 Overview

IC 512K X 8 CACHE SRAM, 12 ns, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44, Static RAM

TC55VZM208ATGN12 Parametric

Parameter Name	Attribute value
Maker	Toshiba Semiconductor
Parts packaging code	TSOP2
package instruction	TSOP2, TSOP44,.46,32
Contacts	44
Reach Compliance Code	unknown
ECCN code	3A991.B.2.A
Maximum access time	12 ns
I/O type	COMMON
JESD-30 code	R-PDSO-G44
length	18.41 mm
memory density	4194304 bit
Memory IC Type	CACHE SRAM
memory width	8
Number of functions	1
Number of terminals	44
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSOP44,.46,32
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum standby current	0.004 A
Minimum standby current	3 V
Maximum slew rate	0.07 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	DUAL
width	10.16 mm

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TC55VZM208AJGN/ATGN08,10,12

TENTATIVE

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

524,288-WORD BY 8-BIT CMOS STATIC RAM

DESCRIPTION

The TC55VZM208AJGN/ATGN is a 4,194,304-bit high-speed static random access memory (SRAM) organized as

524,288 words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed,

it operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,

and output enable ( OE ) provides fast memory access. This device is well suited to cache memory applications

where high-speed access and high-speed storage are required. All inputs and outputs are directly LVTTL

compatible. The TC55VZM208AJGN/ATGN is available in plastic 36-pin SOJ and 44-pin TSOP with 400mil width

for high density surface assembly.

FEATURES

•

Fast access time (the following are maximum values)

TC55VZM208AJGN/ATGN08:8 ns

TC55VZM208AJGN/ATGN10:10 ns

TC55VZM208AJGN/ATGN12:12 ns

Low-power dissipation

(the following are maximum values)

Cycle Time

Operation (max)

100

•

Single power supply voltage of 3.3 V

0.3 V

Fully static operation

All inputs and outputs are LVTTL compatible

Output buffer control using OE

Package:

SOJ36-P-400-1.27 (AJGN)

(Weight: 1.35 g typ)

TSOP II44-P-400-0.80 (ATGN) (Weight: 0.45 g typ)

Standby:4 mA (both devices)

PIN ASSIGNMENT

(TOP VIEW)

36 PIN SOJ

44 PIN TSOP

PIN NAMES

A0 to A18

A17

I/O1

I/O2

GND

I/O3

I/O4

A16

A15

A14

A13

A18

I/O8

I/O7

GND

I/O6

I/O5

A10

A11

A12

I/O1 to I/O8

Address Inputs

Data Inputs/Outputs

Chip Enable Input

Write Enable Input

Output Enable Input

Power (+3.3 V)

Ground

No Connection

Not Usable (Input)

A17

I/O1

I/O2

GND

I/O3

I/O4

A16

A15

A14

A13

A18

I/O8

I/O7

GND

I/O6

I/O5

A10

A11

A12

GND

(TC55VZM208AJGN)

(TC55VZM208ATGN)

2002-02-05

1/10

TC55VZM208ATGN12 Related Products

	TC55VZM208ATGN12	TC55VZM208ATGN08
Description	IC 512K X 8 CACHE SRAM, 12 ns, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44, Static RAM	IC 512K X 8 CACHE SRAM, 8 ns, PDSO44, 0.400 INCH, 0.80 MM PITCH, PLASTIC, TSOP2-44, Static RAM
Maker	Toshiba Semiconductor	Toshiba Semiconductor
Parts packaging code	TSOP2	TSOP2
package instruction	TSOP2, TSOP44,.46,32	TSOP2, TSOP44,.46,32
Contacts	44	44
Reach Compliance Code	unknown	unknown
ECCN code	3A991.B.2.A	3A991.B.2.A
Maximum access time	12 ns	8 ns
I/O type	COMMON	COMMON
JESD-30 code	R-PDSO-G44	R-PDSO-G44
length	18.41 mm	18.41 mm
memory density	4194304 bit	4194304 bit
Memory IC Type	CACHE SRAM	CACHE SRAM
memory width	8	8
Number of functions	1	1
Number of terminals	44	44
word count	524288 words	524288 words
character code	512000	512000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C
organize	512KX8	512KX8
Output characteristics	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	TSOP2
Encapsulate equivalent code	TSOP44,.46,32	TSOP44,.46,32
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL	PARALLEL
power supply	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm
Maximum standby current	0.004 A	0.004 A
Minimum standby current	3 V	3 V
Maximum slew rate	0.07 mA	0.08 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm
Terminal location	DUAL	DUAL
width	10.16 mm	10.16 mm

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