19013 36th Ave. West
Suite H
Lynnwood, WA 98036, USA
P1145-3S Series
Full Size (14 Pin DIP) Metal Clock Oscillator
CMOS with Enable/ Disable
Lower Ringing Noise Option Available to Reduce EMI
Available in Thru-Hole or Surface Mount Configuration
Standard Specifications
Overall Frequency Stability
Operating Temperature Range
Supply Voltage (Vcc)
Symmetry (Duty Cycle)
Logic Levels
Output Load
Ringing Noise
Enable/Disable Option (E/D)
P1145-3S: ± 50 PPM, P1144-3S: ± 25 PPM, P1120-3S: ± 20 PPM over Operating Temp. Range
0 to +70°C is standard, but can be extended to
-
40 to +85°C for certain frequencies
5.0 volts and 3.3 volts available
40/60 to 60/40% is standard, but 45/55% at 50% of Vcc is also available (see Waveform 1)
Logic “1”
90% of Vcc MIN;
Logic “0”
10% of Vcc MAX
Standard load is 15pF maximum, see Test Circuit 3 (consult factory for
heavier
loads)
Depends on frequency and output load. See EMI application note
Output enabled when Pin #1 is open or at Logic “1”; Output disabled when Pin #1 is at Logic “0”.
Supply Current
Icc (mA) w/ 15pF load
Typical
Maximum
Rise and Fall Time
Tr & Tf (nS) w/ 15pF load
Typical
Maximum
650 kHz
–
69.999 MHz
Frequency Range
(MHz)
0.650 –
10.001 –
26.000 –
35.000 –
50.001 –
10.000
25.999
34.999
50.000
69.999
6.5
15.0
18.0
25.0
32.0
10.0
20.0
25.0
30.0
35.0
3.0
2.5
2.5
2.5
2.5
4.0
3.5
3.5
3.5
3.5
Part Numbering Guide
Packaging
Tube or on Pads,
SMD: Bulk
P11 45 - 3S
V -- 60.0M - 30 - SMD
Surface Mount Option
Model
Frequency Stability
45 = ± 50 PPM
44 = ± 25 PPM
20 = ± 20 PPM
Non-Std Output Load:
Blank = 15 pF max,
30 = 30 pF max,
Frequency in MHz
50 = 50 pF max
Special Specifications (choose all that apply)
Blank: Std Specs (5.0V
± 10%,
0 to +70
°
C, 40/60% Sym)
E: Extended Operating Temperature Range (- 40 to +85
°
C)
N: Lower Ringing Noise
S: 45/55% Symmetry at 50% of Vcc
V: Supply Voltage of 3.3 volts
± 10%
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
Mechanical: inches (mm)
not to scale
Surface Mount
.820 (20.84) MAX
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.
.200 (5.08)
MAX
.807 (20.5) MAX
.500 (12.7) MAX
PLETRONICS
.020
(.51)
.031 (0.8)
.300 (7.62)
.600 (15.24)
OUT
8
14
Vcc
.247 (6.28)
MAX
.560 (14.23) MAX
.300 (7.62)
.767 (19.49)
.600 (15.24)
8 8
8
7
7
7
1
14
14
14
1
1
7
GND
1
E/D
.250 (6.35) MAX
Solder pad layout may use any combination of pins 1, 7, 8 & 14 shown.
Recommended pad size is .12 (3.1) x .07 (1.8) typical.
.200 (5.08) TYP
Jan 2002
Pl tronics, Inc.
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
17
DSP and ARM Processors
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