Preliminary
Datasheet
R2A20134SP
LED Lighting Power Controller
Description
R2A20134SP is a LED lighting controller IC.
R03DS0033EJ0200
Rev.2.00
Jun 03, 2011
Control method is selectable for each system demand, fixed frequency or zero current detection mode.
High accuracy LED current feed-back system makes more efficient LED performance.
Critical Conduction Mode PFC control realizes high power factor and zero current switching.
And Peak Current Mode makes it possible to reduce external parts and realize low system cost.
Features
Absolute Maximum Ratings
Supply voltage Vcc: 24 V
Operating junction temperature Tjopr: –40 to +150°C
Electrical characteristics
UVLO operation start voltage VH: 12 V
0.8 V
UVLO operation shutdown voltage VL: 9.2 V
0.7 V
UVLO hysteresis voltage Hysuvl: 2.8 V
0.7 V
Functions
Selectable for each targeted system,
1. Zero current detection mode (When Rrt is connected by GND)
2. Fixed frequency mode (When Rrt is connected by Vref)
Adjustable for Switching frequency (When Rrt is connected by Vref)
Overcurrent protection
Package lineup: Pb-free SOP-8 (JEDEC)
Ordering Information
Part No.
R2A20134SP#W5
Package Name
—
Package Code
PRSP0008DJ-A
Package
Abbreviation
SP
Taping Abbreviation
(Quantity)
W (2,500 pcs/reel)
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 1 of 10
R2A20134SP
Preliminary
Pin Arrangement
FB
COMP
RT
VREF
1
2
3
4
8
7
6
5
VCC
OUT
GND
CS
(Top view)
Pin Function
Pin No.
1
2
3
4
5
6
7
8
Pin Name
FB
COMP
RT
VREF
CS
GND
OUT
VCC
Input/Output
Input
Output
Input/Output
Output
Input
—
Output
Input
Function
Error amplifier input terminal
Error amplifier output terminal
A resistor connection terminal for RAMP current setting
Reference voltage output terminal
Zero current detection and overcurrent detection input terminal
Ground
Power MOSFET drive terminal
Supply voltage terminal
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 2 of 10
R2A20134SP
Preliminary
Block Diagram
•
Rrt: Connect to GND (Zero Current Detection Mode)
VREF 4
VREF: 5.02 V
UVLO
OFF: 9.2 V/ON: 12 V
VREF
53
μA
–
+
13 mV
Logic Block
CS 5
–
0.6 V +
VREF
250 nA
–
+
1 FB
7 OUT
6 GND
8 VCC
VREF
Ramp Control
Error
Amp
–
+
RT
3
1V
0.605 V
Rrt
10 pF
4.1 V
2 COMP
•
Rrt: Connect to VREF (Fixed Frequency Mode)
VREF 4
VREF
53
μA
CS 5
+
–
0.6 V
Max Duty Detect
1V
VREF
2V
Rrt
VREF
Ramp Control
3
1V
–
+
+
–
Error
Amp
–
+
+
–
VREF
250 nA
1 FB
Logic Block
7 OUT
6 GND
VREF: 5.02 V
UVLO
OFF: 9.2 V/ON: 12 V
8 VCC
RT
0.605 V
10 pF
4.1 V
2 COMP
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 3 of 10
R2A20134SP
Preliminary
Absolute Maximum Ratings
(Ta = 25°C)
Item
Power Supply Voltage
OUT terminal peak current
OUT terminal DC current
RT terminal current
VREF terminal current
Vref terminal voltage
FB terminal voltage
CS terminal voltage
Power dissipation
Operating junction temperature
Storage temperature
Notes: 1.
2.
3.
4.
Symbol
VCC
Ipk-snk-out
Ipk-src-out
Idc-snk-out
Idc-src-out
Irt
Iref
Vt-ref
Vt-fb
Vcs
Pt
Tj-pr
Tstg
Ratings
–0.3 to +24
0.9
–0.50
100
–50
–200
–5
–0.3 to Vref + 0.3
–0.3 to +5
–0.3 to +5
0.68
–40 to +150
–55 to +150
Unit
V
A
mA
A
mA
V
V
V
W
°C
°C
Note
3
4
Rated voltages are with reference to the GND terminal.
For rated currents, inflow to the IC is indicated by (+), and outflow by (–).
Shows the transient current when driving a capacitive load.
In case of R2A20134SP:
ja
= 120°C/W
This value is a thing mounting on 40
40
1.6 [mm], a glass epoxy board of wiring density 10%.
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 4 of 10
R2A20134SP
Preliminary
Electrical Characteristics
(Ta = 25°C, VCC = 15 V, CS = 0 V, FB = COMP, RRT = 200 k)
Supply
Item
UVLO turn-on threshold
UVLO turn-off threshold
UVLO hysteresis
Standby current
Operating current
Reference voltage
Temperature stability
Line regulation
Load regulation
Error
amplifier
Feedback voltage
Input bias current
Open loop gain
Upper clamp voltage
Low voltage
Source current
Sink current
Transconductance
RT
RAMP offset voltage
RAMP amplitude
RT voltage1
RT voltage2
ZCD threshold voltage
Input bias current
Restart time delay
Symbol
Vuvlh
Vuvll
Hysuvl
Istby
Icc
Vref
dVref
Vref-line
Vref-load
Vfb
Ifb
Av
Vclamp_comp
Vl-comp
Isrc-comp
Isnk-comp
gm
Voffset_ramp
dVramp
V-rt1
V-rt2
Vzcd
Ics
Tstart
Min
11.2
8.5
2.1
—
—
4.945
—
—
—
0.587
–0.75
—
3.85
—
–13
6
25
—
2.9
1.9
2.9
7
–85
45
Typ
12
9.2
2.8
130
2.2
5.020
80
5
5
0.605
–0.25
63
4.10
0.1
–9.5
9.5
45
1.0
3.1
2.0
3.0
13
–53
75
Max
12.8
9.9
3.5
250
3.3
5.095
—
20
20
0.623
–0.1
—
4.30
0.3
–6
13
70
—
3.3
2.1
3.1
19
–25
140
Unit
V
V
V
A
mA
V
ppm/°C
mV
mV
V
A
dB
V
V
A
A
s
V
V
V
V
mV
A
s
Test Conditions
VCC = Vuvlh – 0.2 V
Isource = 0 mA
Tj = –40 to 150°C
*
1
Isource = 0 mA
Vcc = 10 V to 24 V
Isource = 0 mA to –5 mA
Measured pin: FB
FB = 0.3 V
COMP: Open
FB = 0.9 V
COMP: Open
FB = 0.3 V
COMP: 2.5 V
FB = 0.9 V
COMP: 2.5 V
FB = 0.55 V
0.65 V
COMP: 2.5 V
*2
RT-GND: 200 k
RT-Vref: 200 k
Vcs = 13 mV
FB = 0.3 V, COMP = 2.5 V
VREF
Zero
current
detector
Restart
Notes:
*1
Design spec
*2
dVramp = Vclamp_comp – Voff_ramp
R03DS0033EJ0200 Rev.2.00
Jun 03, 2011
Page 5 of 10
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