Intel® Atom™ Processor 230
Series
Datasheet
April 2010
∆
Document Number: 319977-003
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2
Datasheet
Contents
1
Introduction .....................................................................................................6
1.1
1.2
1.3
2
2.1
Intel® Atom™ Processor 230 Series Features .............................................6
Terminology ..........................................................................................7
Reference Documents .............................................................................8
Clock Control and Low-power States .........................................................9
2.1.1
Thread Low-power State Descriptions ......................................... 10
2.1.2
Package Low-power State Descriptions ....................................... 11
2.1.3
Front Side Bus ........................................................................ 11
FSB and GTLREF .................................................................................. 12
Power and Ground Pins ......................................................................... 12
Decoupling Guidelines ........................................................................... 12
3.3.1
VCCP Decoupling ..................................................................... 13
3.3.2
FSB AGTL+ Decoupling ............................................................ 13
Voltage Identification and Power Sequencing ............................................ 13
Catastrophic Thermal Protection ............................................................. 15
Reserved and Unused Pins ..................................................................... 15
FSB Frequency Select Signals (BSEL[2:0]) ............................................... 16
FSB Signal Groups ................................................................................ 16
CMOS Asynchronous Signals .................................................................. 17
3.10 Maximum Ratings ......................................................................... 17
Processor DC Specifications ................................................................... 18
AGTL+ FSB Specifications ...................................................................... 22
Package Mechanical Specifications .......................................................... 23
4.1.1
Package Mechanical Drawings ................................................... 23
4.1.2
Package Loading Specifications ................................................. 24
4.1.3
Processor Mass Specifications ................................................... 24
4.1.4
Processor Pinout Assignment .................................................... 24
Signal Description ................................................................................ 30
Thermal
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
Specifications .......................................................................... 38
Thermal Diode ........................................................................ 39
Intel® Thermal Monitor............................................................ 41
Digital Thermal Sensor ............................................................. 42
Out of Specification Detection ................................................... 43
PROCHOT# Signal Pin .............................................................. 43
Low Power Features ..........................................................................................9
3
Electrical Specifications .................................................................................... 12
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
4
4.1
Package Mechanical Specifications and Ball Information ........................................ 23
4.2
5
5.1
Thermal Specifications and Design Considerations ............................................... 38
6
Debug Tools Specifications ............................................................................... 45
Datasheet
3
Figures
Figure
Figure
Figure
Figure
1. Thread Low-power States .....................................................................9
2. Package Mechanical Drawing ................................................................ 23
3. Pinout Diagram (Top View, Left Side) ................................................... 25
4. Pinout Diagram (Top View, Right Side) ................................................. 26
Tables
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
Table
1. Coordination of Thread Low-power States at the Package Level ................. 10
2. Voltage Identification Definition ............................................................ 13
3. Processor VID Pin to VRD11 VID Pin Mapping .......................................... 15
4. BSEL[2:0] Encoding for BCLK Frequency ................................................ 16
5. FSB Pin Groups................................................................................... 16
6. Processor Absolute Maximum Ratings .................................................... 18
7. Voltage and Current Specifications for the Intel® Atom™ Processor ........... 19
8. FSB Differential BCLK Specifications ...................................................... 20
9. AGTL+/CMOS Signal Group DC Specifications ......................................... 20
10. Legacy CMOS Signal Group DC Specifications ........................................ 21
11. Open Drain Signal Group DC Specifications ........................................... 22
13. Pinout Arranged By Signal Name ......................................................... 27
14. Signal Description .............................................................................. 30
15. Power Specifications for the Processor .................................................. 39
16. Thermal Diode Interface ..................................................................... 40
17. Thermal Diode Parameters using Transistor Model ................................. 40
4
Datasheet
Revision History
Revision
Number
001
•
Initial Release
•
Update pin-map
•
Add SSSE3
002
•
Changed A[35:2] to A[32:2]
•
Changed Vboot
•
Changed Ron and Rodt
•
Removed L2 Dynamic Cache Sizing
003
•
Updated Table 7: Removed dI/dt details from the table
April 2010
February 2009
Description
Revision
Date
June 2008
§
Datasheet
5