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M36W832BE100ZA6

Description
Memory Circuit, 2MX16, CMOS, PBGA66, 0.80 MM PITCH, STACK, LFBGA-66
Categorystorage    storage   
File Size350KB,59 Pages
ManufacturerNumonyx ( Micron )
Websitehttps://www.micron.com
Download Datasheet Parametric View All

M36W832BE100ZA6 Overview

Memory Circuit, 2MX16, CMOS, PBGA66, 0.80 MM PITCH, STACK, LFBGA-66

M36W832BE100ZA6 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNumonyx ( Micron )
Parts packaging codeBGA
package instruction0.80 MM PITCH, STACK, LFBGA-66
Contacts66
Reach Compliance Codenot_compliant
Other featuresALSO CONTAINS 512K X 16 SRAM
JESD-30 codeR-PBGA-B66
JESD-609 codee0
length12 mm
memory density33554432 bit
Memory IC TypeMEMORY CIRCUIT
memory width16
Number of functions1
Number of terminals66
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX16
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Certification statusNot Qualified
Maximum seat height1.4 mm
Maximum supply voltage (Vsup)3.3 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
width8 mm
M36W832TE
M36W832BE
32 Mbit (2Mb x16, Boot Block) Flash Memory
and 8 Mbit (512K x16) SRAM, Multiple Memory Product
PRODUCT PREVIEW
FEATURES SUMMARY
s
SUPPLY VOLTAGE
– V
DDF
= 2.7V to 3.3V
– V
DDS
= V
DDQF
= 2.7V to 3.3V
– V
PPF
= 12V for Fast Program (optional)
s
s
s
SRAM
s
8 Mbit (512K x 16 bit)
s
s
s
ACCESS TIME: 70ns
LOW V
DDS
DATA RETENTION: 1.5V
POWER DOWN FEATURES USING TWO
CHIP ENABLE INPUTS
ACCESS TIME: 85,100ns
LOW POWER CONSUMPTION
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code, M36W832TE: 88BAh
– Bottom Device Code, M36W832BE: 88BBh
Figure 1. Packages
FLASH MEMORY
s
32 Mbit (2Mb x16) BOOT BLOCK
– 8 x 4 KWord Parameter Blocks (Top or
Bottom Location)
s
FBGA
PROGRAMMING TIME
– 10µs typical
– Double Word Programming Option
Stacked LFBGA66 (ZA)
8 x 8 ball array
s
BLOCK LOCKING
– All blocks locked at Power up
– Any combination of blocks can be locked
– WPF for Block Lock-Down
s
s
s
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
COMMON FLASH INTERFACE
– 64 bit Security Code
SECURITY
– 64 bit user programmable OTP cells
– 64 bit unique device identifier
– One parameter block permanently lockable
s
July 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
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