PHP55N03LTT/R datasheet, PDF - EEWORLD Datasheet

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PHP55N03LTT/R: DescriptionTRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, FET General Purpose Power; CategoryDiscrete semiconductor The transistor; File Size110KB，11 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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PHP55N03LTT/R Overview

TRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, FET General Purpose Power

PHP55N03LTT/R Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	LOGIC LEVEL COMPATIBLE
Avalanche Energy Efficiency Rating (Eas)	60 mJ
Shell connection	DRAIN
Configuration	SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage	25 V
Maximum drain current (ID)	55 A
Maximum drain-source on-resistance	0.018 Ω
FET technology	METAL-OXIDE SEMICONDUCTOR
JEDEC-95 code	TO-220AB
JESD-30 code	R-PSFM-T3
Number of components	1
Number of terminals	3
Operating mode	ENHANCEMENT MODE
Maximum operating temperature	175 °C
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	FLANGE MOUNT
Polarity/channel type	N-CHANNEL
Maximum power consumption environment	103 W
Maximum pulsed drain current (IDM)	220 A
Certification status	Not Qualified
surface mount	NO
Terminal form	THROUGH-HOLE
Terminal location	SINGLE
transistor applications	SWITCHING
Transistor component materials	SILICON
Maximum off time (toff)	190 ns
Maximum opening time (tons)	175 ns

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Philips Semiconductors

Product specification

N-channel TrenchMOS™ transistor

Logic level FET

FEATURES

•

’Trench’

technology

• Very low on-state resistance

• Fast switching

• Low thermal resistance

• Logic level compatible

PHP55N03LT, PHB55N03LT

PHD55N03LT

QUICK REFERENCE DATA

SYMBOL

DSS

= 25 V

= 55 A

DS(ON)

≤

14 mΩ (V

= 10 V)

DS(ON)

≤

18 mΩ (V

= 5 V)

GENERAL DESCRIPTION

N-channel enhancement mode logic level field-effect power transistor in a plastic envelope using ’trench’ technology.

Applications:-

• High frequency computer motherboard d.c. to d.c. converters

• High current switching

The PHP55N03LT is supplied in the SOT78 (TO220AB) conventional leaded package.

The PHB55N03LT is supplied in the SOT404 (D

PAK) surface mounting package.

The PHD55N03LT is supplied in the SOT428 (DPAK)surface mounting package.

PINNING

tab

DESCRIPTION

gate

drain

source

SOT78 (TO220AB)

tab

SOT404 (D

PAK)

tab

SOT428 (DPAK)

tab

1 23

drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

DSS

DGR

GSM

tot

, T

stg

Drain-source voltage

Drain-gate voltage

Gate-source voltage (DC)

Gate-source voltage (pulse

peak value)

Drain current (DC)

Drain current (pulse peak

value)

Total power dissipation

Operating junction and

storage temperature

CONDITIONS

= 25 ˚C to 175˚C

= 25 ˚C to 175˚C; R

= 20 kΩ

≤

150˚C

= 25 ˚C

= 100 ˚C

= 25 ˚C

MIN.

- 55

MAX.

220

103

175

UNIT

˚C

It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.

October 1999

Rev 1.200

PHP55N03LTT/R Related Products

	PHP55N03LTT/R	PHB55N03LT	PHB55N03LTT/R	PHB55N03LT/T3	PHD55N03LT	PHD55N03LT/T3	PHP55N03LT
Description	TRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, FET General Purpose Power	55A, 25V, 0.018ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, D2PAK-3	TRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, D2PAK-3, FET General Purpose Power	TRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, D2PAK-3, FET General Purpose Power	TRANSISTOR 55 A, 25 V, 0.016 ohm, N-CHANNEL, Si, POWER, MOSFET, PLASTIC, DPAK-3, FET General Purpose Power	TRANSISTOR 55 A, 25 V, 0.016 ohm, N-CHANNEL, Si, POWER, MOSFET, DPAK-3, FET General Purpose Power	TRANSISTOR 55 A, 25 V, 0.018 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB, PLASTIC, TO-220AB, 3 PIN, FET General Purpose Power
package instruction	FLANGE MOUNT, R-PSFM-T3	SMALL OUTLINE, R-PSSO-G2	SMALL OUTLINE, R-PSSO-G2	SMALL OUTLINE, R-PSSO-G2	SMALL OUTLINE, R-PSSO-G2	SMALL OUTLINE, R-PSSO-G2	FLANGE MOUNT, R-PSFM-T3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Other features	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE	LOGIC LEVEL COMPATIBLE
Avalanche Energy Efficiency Rating (Eas)	60 mJ	60 mJ	60 mJ	60 mJ	60 mJ	60 mJ	60 mJ
Shell connection	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN
Configuration	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage	25 V	25 V	25 V	25 V	25 V	25 V	25 V
Maximum drain current (ID)	55 A	55 A	55 A	55 A	55 A	55 A	55 A
Maximum drain-source on-resistance	0.018 Ω	0.018 Ω	0.018 Ω	0.018 Ω	0.016 Ω	0.016 Ω	0.018 Ω
FET technology	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR
JESD-30 code	R-PSFM-T3	R-PSSO-G2	R-PSSO-G2	R-PSSO-G2	R-PSSO-G2	R-PSSO-G2	R-PSFM-T3
Number of components	1	1	1	1	1	1	1
Number of terminals	3	2	2	2	2	2	3
Operating mode	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE
Maximum operating temperature	175 °C	175 °C	175 °C	175 °C	175 °C	175 °C	175 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLANGE MOUNT	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	FLANGE MOUNT
Polarity/channel type	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL
Maximum power consumption environment	103 W	103 W	103 W	103 W	103 W	103 W	103 W
Maximum pulsed drain current (IDM)	220 A	220 A	220 A	220 A	220 A	220 A	220 A
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	YES	YES	YES	YES	YES	NO
Terminal form	THROUGH-HOLE	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE
Terminal location	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE
transistor applications	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING
Transistor component materials	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON
Maximum off time (toff)	190 ns	190 ns	190 ns	190 ns	190 ns	190 ns	190 ns
Maximum opening time (tons)	175 ns	175 ns	175 ns	175 ns	175 ns	175 ns	175 ns
Contacts	-	3	3	3	3	3	3
Base Number Matches	-	1	1	1	1	-	-

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