W25Q64DW
1.8V 64M-BIT
SERIAL FLASH MEMORY WITH
DUAL/QUAD SPI & QPI
-1-
Publication Release Date: September 18, 2012
Revision D
W25Q64DW
Table of Contents
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ............................................................................................................... 5
FEATURES ....................................................................................................................................... 5
PIN CONFIGURATION SOIC 208-MIL ............................................................................................. 6
PAD CONFIGURATION WSON 6X5-MM / 8X6-MM........................................................................ 6
PIN DESCRIPTION SOIC 208-MIL, WSON 6X5/8X6-MM ............................................................... 6
PIN CONFIGURATION SOIC 300-MIL ............................................................................................. 7
PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 7
7.1
7.2
7.3
7.4
7.5
7.6
8.
9.
Package Types ..................................................................................................................... 8
Chip Select (/CS) .................................................................................................................. 8
Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ..................................... 8
Write Protect (/WP) .............................................................................................................. 8
HOLD (/HOLD) ..................................................................................................................... 8
Serial Clock (CLK) ................................................................................................................ 8
BLOCK DIAGRAM ............................................................................................................................ 9
FUNCTIONAL DESCRIPTION ....................................................................................................... 10
9.1
SPI/QPI OPERATIONS ...................................................................................................... 10
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
Standard SPI Instructions ..................................................................................................... 10
Dual SPI Instructions ............................................................................................................ 10
Quad SPI Instructions ........................................................................................................... 11
QPI Instructions .................................................................................................................... 11
Hold Function ....................................................................................................................... 11
Write Protect Features ......................................................................................................... 12
9.2
10.
WRITE PROTECTION ....................................................................................................... 12
9.2.1
CONTROL AND STATUS REGISTERS......................................................................................... 13
10.1
STATUS REGISTER .......................................................................................................... 13
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.1.7
10.1.8
10.1.9
10.1.10
10.1.11
10.1.12
BUSY .................................................................................................................................. 13
Write Enable Latch (WEL) .................................................................................................. 13
Block Protect Bits (BP2, BP1, BP0) .................................................................................... 13
Top/Bottom Block Protect (TB) ........................................................................................... 13
Sector/Block Protect (SEC) ................................................................................................ 13
Complement Protect (CMP)................................................................................................ 14
Status Register Protect (SRP1, SRP0)............................................................................... 14
Erase/Program Suspend Status (SUS) .............................................................................. 14
Security Register Lock Bits (LB3, LB2, LB1, LB0) .............................................................. 14
Quad Enable (QE) ............................................................................................................ 15
W25Q64DW Status Register Memory Protection (CMP = 0) ........................................... 16
W25Q64DW Status Register Memory Protection (CMP = 1) ........................................... 17
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W25Q64DW
10.2
INSTRUCTIONS................................................................................................................. 18
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.2.7
10.2.8
10.2.9
10.2.10
10.2.11
10.2.12
10.2.13
10.2.14
10.2.15
10.2.16
10.2.17
10.2.18
10.2.19
10.2.20
10.2.21
10.2.22
10.2.23
10.2.24
10.2.25
10.2.26
10.2.27
10.2.28
10.2.29
10.2.30
10.2.31
10.2.32
10.2.33
10.2.34
10.2.35
10.2.36
10.2.37
10.2.38
10.2.39
10.2.40
Manufacturer and Device Identification .............................................................................. 18
Instruction Set Table 1 (Standard SPI Instructions) ........................................................... 19
Instruction Set Table 2 (Dual SPI Instructions) ................................................................... 20
Instruction Set Table 3 (Quad SPI Instructions) ................................................................. 20
Instruction Set Table 4 (QPI Instructions) ........................................................................... 21
Write Enable (06h) ............................................................................................................. 23
Write Enable for Volatile Status Register (50h) .................................................................. 23
Write Disable (04h)............................................................................................................. 24
Read Status Register-1 (05h) and Read Status Register-2 (35h) ...................................... 24
Write Status Register (01h) .............................................................................................. 25
Read Data (03h) ............................................................................................................... 27
Fast Read (0Bh) ............................................................................................................... 28
Fast Read Dual Output (3Bh) ........................................................................................... 30
Fast Read Quad Output (6Bh) .......................................................................................... 31
Fast Read Dual I/O (BBh) ................................................................................................. 32
Fast Read Quad I/O (EBh) ............................................................................................... 34
Word Read Quad I/O (E7h) .............................................................................................. 37
Octal Word Read Quad I/O (E3h)..................................................................................... 39
Set Burst with Wrap (77h) ................................................................................................ 41
Page Program (02h) ......................................................................................................... 42
Quad Input Page Program (32h) ...................................................................................... 44
Sector Erase (20h) ........................................................................................................... 44
32KB Block Erase (52h) ................................................................................................... 46
64KB Block Erase (D8h) ................................................................................................... 47
Chip Erase (C7h / 60h) ..................................................................................................... 48
Erase / Program Suspend (75h) ....................................................................................... 49
Erase / Program Resume (7Ah) ....................................................................................... 51
Power-down (B9h) ............................................................................................................ 52
Release Power-down / Device ID (ABh) ........................................................................... 53
Read Manufacturer / Device ID (90h) ............................................................................... 55
Read Manufacturer / Device ID Dual I/O (92h) ................................................................. 56
Read Manufacturer / Device ID Quad I/O (94h) ............................................................... 57
Read Unique ID Number (4Bh)......................................................................................... 58
Read JEDEC ID (9Fh) ...................................................................................................... 59
Erase Security Registers (44h) ......................................................................................... 60
Program Security Registers (42h) .................................................................................... 61
Read Security Registers (48h) ......................................................................................... 62
Set Read Parameters (C0h) ............................................................................................. 63
Burst Read with Wrap (0Ch)............................................................................................. 64
Enable QPI (38h) .............................................................................................................. 65
-3-
Publication Release Date: September 18, 2012
Revision D
W25Q64DW
10.2.41
10.2.42
Disable QPI (FFh) ............................................................................................................. 66
Enable Reset (66h) and Reset (99h) ................................................................................ 67
11.
ELECTRICAL CHARACTERISTICS ............................................................................................... 68
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
Absolute Maximum Ratings ................................................................................................ 68
Operating Ranges............................................................................................................... 68
Power-Up Power-Down Timing and Requirements ............................................................ 69
DC Electrical Characteristics .............................................................................................. 70
AC Measurement Conditions .............................................................................................. 71
AC Electrical Characteristics .............................................................................................. 72
AC Electrical Characteristics (cont’d) ................................................................................. 73
Serial Output Timing ........................................................................................................... 74
Serial Input Timing .............................................................................................................. 74
HOLD Timing .................................................................................................................... 74
WP Timing ........................................................................................................................ 74
8-Pin SOIC 208-mil (Package Code SS) ............................................................................ 75
8-Contact 6x5mm WSON (Package Code ZP) .................................................................. 76
8-Contact 8x6mm WSON (Package Code ZE) .................................................................. 78
16-Pin SOIC 300-mil (Package Code SF) .......................................................................... 79
Valid Part Numbers and Top Side Marking ........................................................................ 81
12.
PACKAGE SPECIFICATION .......................................................................................................... 75
12.1
12.2
12.3
12.4
13.
14.
ORDERING INFORMATION .......................................................................................................... 80
13.1
REVISION HISTORY ...................................................................................................................... 82
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W25Q64DW
1. GENERAL DESCRIPTION
The W25Q64DW (64M-bit) Serial Flash memory provides a storage solution for systems with limited
space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash
devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP)
and storing voice, text and data. The device operates on a single 1.7V to 1.95V power supply with current
consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving
packages.
The W25Q64DW array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes
can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128
(32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64DW
has 2,048 erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater
flexibility in applications that require data and parameter storage. (See figure 2.)
The W25Q64DW support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-
clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI),
I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when
using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient
memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP
(execute in place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control,
provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and
device identification, a 64-bit Unique Serial Number and four 256-bytes Security Registers.
2. FEATURES
•
Family of SpiFlash Memories
– W25Q64DW: 64M-bit / 8M-byte (8,388,608)
– Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
– Dual SPI: CLK, /CS, IO
0
, IO
1
, /WP, /Hold
– Quad SPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
– QPI: CLK, /CS, IO
0
, IO
1
, IO
2
, IO
3
•
Highest Performance Serial Flash
– 104MHz Standard/Dual/Quad SPI clocks
– 208/416MHz equivalent Dual/Quad SPI
– 50MB/S continuous data transfer rate
– More than 100,000 erase/program cycles
– More than 20-year data retention
•
Efficient “Continuous Read” and QPI Mode
– Continuous Read with 8/16/32/64-Byte Wrap
– As few as 8 clocks to address memory
– Quad Peripheral Interface (QPI) reduces
instruction overhead
– Allows true XIP (execute in place) operation
– Outperforms X16 Parallel Flash
•
Low Power, Wide Temperature Range
– Single 1.7 to 1.95V supply
– 4mA active current, <1µA Power-down (typ.)
– -40°C to +85°C operating range
•
Flexible Architecture with 4KB sectors
– Uniform Sector Erase (4K-bytes)
– Uniform Block Erase (32K and 64K-bytes)
– Program 1 to 256 byte per programmable page
– Erase/Program Suspend & Resume
•
Advanced Security Features
– Software and Hardware Write-Protect
– Top/Bottom, 4KB complement array protection
– Power Supply Lock-Down and OTP protection
– 64-Bit Unique ID for each device
– 4X256-Bytes Security Registers with OTP locks
– Volatile & Non-volatile Status Register Bits
•
Space Efficient Packaging
– 8-pin SOIC 208-mil
– 8-pad WSON 6x5-mm/8x6-mm
– 16-pin SOIC 300-mil
– Contact Winbond for KGD and other options
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Publication Release Date: September 18, 2012
Revision D
FPGA/CPLD
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