TRANSFORMERS IN SMD OR THT PACKAGES
ADSL Applications
FEATURES
Designed for digital telecom applications.
Product matched to leading transceiver ICs.
Standard 10 pin SMD or THT packages.
Designed to exceed ANSI and ETSI standards.
Excellent total harmonic distortion.
Recognized to TNV-3 under IEC60950/EN60950.
Other designs available.
70Z71xx
60Z9xx
SCHEMATIC A
VITEC
70Z71xx
0.550 Max
13.99 Max
0.200
5.08
0.400
10.17
1
4
2
5
Line
Chip
10
6
9
7
VITEC
60Z9xx
0.550 Max
13.99 Max
0.695 Max
17.65 Max
SCHEMATIC B
1
3
2
4
Chip
Line
10
8
9
7
0.005
0.13
0.475 Max
12.07 Max
0.500 Max
12.70 Max
SCHEMATIC C
0.100
2.54
Drawing NOT to Scale. Dimensions Inches/mm. +/- 0.005/0.127 Unless noted.
1
3
2
4
Line
Chip
9
8
7
0.100
2.54
Drawing NOT to Scale. Dimensions Inches/mm. +/- 0.005/0.127 Unless noted.
ELECTRICAL CHARACTERISTICS @ 25
o
C
Part Number
Turns Ratio
Ratio
+/- 2%
(1-4:10-7)
1:1
(1-4:2-5/10-6:9-7)
1:1/1:1
(1-5:10-7)
1:1.8
L
P
(1)
mH
+/- 6%
(1-4)
5.00
(1-5)
3.96
(1-4)
1.75
3.96
(1-4)
3.96
(1-4)
3.96
(1-4)
1.75
L
L
(2)
uH
MAX
18
(1-5,sht 10-7)
22
(1-4,sht 10-7)
7.5
18
(1-4,sht 9-7)
18
(1-4,sht 9-7)
18
(1-4,sht 10-7)
7.5
C
C
(3)
pF
MAX
--
(1-10)
60
--
60
--
--
--
Primary
DCR
Ohms
+/- 10%
(1-4)
3.00
(1-4/2-5)
2.20/2.20
(1-4)
1.50
(1-4/2-5)
2.52/2.52
(1-3/2-4)
2.1/2.1
(1-3/2-4)
2.04/2.04
(1-4)
1.50
Secondary Dielectric
DCR
Strength
Ohms
+/- 10%
(10-7)
3.00
(10-6/9-7)
4.55/4.85
(10-7)
1.30
(10-6/9-7)
2.42/1.87
(9-7)
4.40
(9-7)
7.40
(10-7)
1.30
Vrms
MIN
1500
1875
1875
1875
1875
1875
1875
THD
dB
NOM
-80 dB
@30KHz
--
-80 dB
@30KHz
--
--
--
-80 dB
@30KHz
Insertion
Longitudinal
Loss
Balance
dB
MAX
0.5 dB
@100KHz
--
0.5 dB
@300KHz
1.5 dB
@772KHz
--
--
--
dB
MIN
40 dB
--
--
40 dB
@20KHz-
1.1MHz
SMD
THT
*
60Z918
60Z934
60Z936
60Z942
60Z948
60Z949
60Z956
70Z7118
B
70Z7134
A
70Z7136
B
70Z7142
A
70Z7148
C
70Z7149
C
70Z7156
B
Notes:
(1)
(2)
(1-4:10-7)
1:1.1
(1-4:2-5:10-6:9-7)
1.2:1.2:1:1
(1-3:2-4/1-4:9-7)
1:1/1.2:1
(1-3:2-4/1-4:9-7)
1:1/1:1.8
(1-4:10-7)
1:1.2
--
--
--
Tested @10KHz, 0.1V
Tested @100KHz, 0.1V
(3)
Tested @10KHz, 1.0V
*A
All tests performed with pin 2 tied to pin 4, pin 6 tied to pin 9.
*B
All tests performed with pin 2 tied to pin 3, pin 8 tied to pin 9.
*C
All tests performed with pin 2 tied to pin 3.
T-635.2
05/01
25
Vitec Electronics Corporation
www.VitecCorp.com